[llvm] d6c6eb3 - [NFCI] Fix set-but-unused warning in AArch64AsmParser.cpp

[Dávid Bolvanský via llvm-commits]

Author: Dávid Bolvanský
Date: 2022-03-25T17:10:37+01:00
New Revision: d6c6eb3db5574225f5073ef1ecca886152ac7038

URL: https://github.com/llvm/llvm-project/commit/d6c6eb3db5574225f5073ef1ecca886152ac7038
DIFF: https://github.com/llvm/llvm-project/commit/d6c6eb3db5574225f5073ef1ecca886152ac7038.diff

LOG: [NFCI] Fix set-but-unused warning in AArch64AsmParser.cpp

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 04ab54c8e0e3e..436572ccfd38d 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3921,7 +3921,6 @@ AArch64AsmParser::tryParseMatrixTileList(OperandVector &Operands) {
   const MCRegisterInfo *RI = getContext().getRegisterInfo();
 
   unsigned PrevReg = FirstReg;
-  unsigned Count = 1;
 
   SmallSet<unsigned, 8> DRegs;
   AArch64Operand::ComputeRegsForAlias(FirstReg, DRegs, ElementWidth);
@@ -3953,7 +3952,6 @@ AArch64AsmParser::tryParseMatrixTileList(OperandVector &Operands) {
     }
 
     PrevReg = Reg;
-    ++Count;
   }
 
   if (parseToken(AsmToken::RCurly, "'}' expected"))