[PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction

ShihPo Hung via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Mar 25 10:13:39 PDT 2022


arcbbb added a comment.

>   declare { <vscale x 1 x i8>, i64 } @llvm.riscv.vaadd.rm.nxv1i8.nxv1i8(
>     <vscale x 1 x i8>,
>     <vscale x 1 x i8>,
>     <vscale x 1 x i8>,
>     i64,
>     i64);

Sorry I make a wrong example as VAADD doesn't saturate.
I should use VSMUL or VSADD.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121376/new/

https://reviews.llvm.org/D121376



More information about the llvm-commits mailing list