[PATCH] D122427: [MIPS] Initial support for MIPS-I load delay slots

[Spencer Alves via Phabricator via llvm-commits]

impiaaa created this revision.
impiaaa added reviewers: atanasyan, djtodoro.
Herald added subscribers: jrtc27, hiraditya, arichardson, sdardis.
Herald added a project: All.
impiaaa requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

LLVM so far has only supported the MIPS-II and above architectures. MIPS-II is pretty close to MIPS-I, the major difference 
being that "load" instructions always take one extra instruction slot to propogate to registers. This patch adds support for 
MIPS-I by adding hazard handling for load delay slots, alongside MIPSR6 forbidden slots and FPU slots, inserting a NOP 
instruction between a load and any instruction immediately following that reads the load's destination register. I also 
included a simple regression test. Since no existing tests target MIPS-I, those all still pass.

Issue ref: https://github.com/simias/psx-sdk-rs/issues/1

I also tested by building a simple demo app with Clang and running it in an emulator.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D122427

Files:
  llvm/lib/Target/Mips/MipsBranchExpansion.cpp
  llvm/lib/Target/Mips/MipsInstrInfo.cpp
  llvm/lib/Target/Mips/MipsInstrInfo.h
  llvm/lib/Target/Mips/MipsSubtarget.cpp
  llvm/lib/Target/Mips/MipsSubtarget.h
  llvm/test/CodeGen/Mips/cpus.ll
  llvm/test/CodeGen/Mips/mips1-load-delay.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D122427.418024.patch
Type: text/x-patch
Size: 9473 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220324/ae5995ce/attachment.bin>