[PATCH] D122458: [RISCV][WIP] Enable TargetLowering::hasBitTest for masks that fit in ANDI.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D122458#3408028 <https://reviews.llvm.org/D122458#3408028>, @spatel wrote:

> Seems fine to me. If I'm seeing it correctly, we wouldn't expect any x86 or Hexagon changes because they don't check for a bit range, just any scalar type.

Correct. I'm not sure if I ran the X86/Hexagon tests before I posted or not. I might have just ran it on RISCV. I'll make sure I do that and maybe add more tests.


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https://reviews.llvm.org/D122458