[llvm] 1533682 - Revert "[X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)"
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 21 13:52:44 PDT 2022
Author: Nikita Popov
Date: 2022-03-21T21:52:36+01:00
New Revision: 15336828395792bfc818e6fcd3d951cba1b8477b
URL: https://github.com/llvm/llvm-project/commit/15336828395792bfc818e6fcd3d951cba1b8477b
DIFF: https://github.com/llvm/llvm-project/commit/15336828395792bfc818e6fcd3d951cba1b8477b.diff
LOG: Revert "[X86] combineAddOrSubToADCOrSBB - Fold ADD/SUB + (AND(SRL(X,Y),1) -> ADC/SBB+BT(X,Y)"
This reverts commit 81569f5b6ef531a48023f28133481262ee1509a3.
This causes a segfault when building consumer-typeset in
ReleaseLTO-g configuration:
https://llvm-compile-time-tracker.com/show_error.php?commit=81569f5b6ef531a48023f28133481262ee1509a3
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/add-sub-bool.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 991a70a499a76..6e1c83f20c7af 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -23523,8 +23523,9 @@ X86TargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,
/// Result of 'and' is compared against zero. Change to a BT node if possible.
/// Returns the BT node and the condition code needed to use it.
-static SDValue LowerAndToBT(SDValue And, ISD::CondCode CC, const SDLoc &dl,
- SelectionDAG &DAG, X86::CondCode &X86CC) {
+static SDValue LowerAndToBT(SDValue And, ISD::CondCode CC,
+ const SDLoc &dl, SelectionDAG &DAG,
+ SDValue &X86CC) {
assert(And.getOpcode() == ISD::AND && "Expected AND node!");
SDValue Op0 = And.getOperand(0);
SDValue Op1 = And.getOperand(1);
@@ -23602,7 +23603,8 @@ static SDValue LowerAndToBT(SDValue And, ISD::CondCode CC, const SDLoc &dl,
if (Src.getValueType() != BitNo.getValueType())
BitNo = DAG.getNode(ISD::ANY_EXTEND, dl, Src.getValueType(), BitNo);
- X86CC = CC == ISD::SETEQ ? X86::COND_AE : X86::COND_B;
+ X86CC = DAG.getTargetConstant(CC == ISD::SETEQ ? X86::COND_AE : X86::COND_B,
+ dl, MVT::i8);
return DAG.getNode(X86ISD::BT, dl, MVT::i32, Src, BitNo);
}
@@ -24308,11 +24310,8 @@ SDValue X86TargetLowering::emitFlagsForSetcc(SDValue Op0, SDValue Op1,
// Lower ((X >>s N) & 1) != 0 to BT(X, N).
if (Op0.getOpcode() == ISD::AND && Op0.hasOneUse() && isNullConstant(Op1) &&
(CC == ISD::SETEQ || CC == ISD::SETNE)) {
- X86::CondCode X86CondCode;
- if (SDValue BT = LowerAndToBT(Op0, CC, dl, DAG, X86CondCode)) {
- X86CC = DAG.getTargetConstant(X86CondCode, dl, MVT::i8);
+ if (SDValue BT = LowerAndToBT(Op0, CC, dl, DAG, X86CC))
return BT;
- }
}
// Try to use PTEST/PMOVMSKB for a tree ORs equality compared with 0.
@@ -24784,9 +24783,9 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
// We know the result of AND is compared against zero. Try to match
// it to BT.
if (Cond.getOpcode() == ISD::AND && Cond.hasOneUse()) {
- X86::CondCode X86CondCode;
- if (SDValue BT = LowerAndToBT(Cond, ISD::SETNE, DL, DAG, X86CondCode)) {
- CC = DAG.getTargetConstant(X86CondCode, DL, MVT::i8);
+ SDValue BTCC;
+ if (SDValue BT = LowerAndToBT(Cond, ISD::SETNE, DL, DAG, BTCC)) {
+ CC = BTCC;
Cond = BT;
AddTest = false;
}
@@ -52295,7 +52294,6 @@ static SDValue combineADC(SDNode *N, SelectionDAG &DAG,
/// If this is an add or subtract where one operand is produced by a cmp+setcc,
/// then try to convert it to an ADC or SBB. This replaces TEST+SET+{ADD/SUB}
/// with CMP+{ADC, SBB}.
-/// Also try (ADD/SUB)+(AND(SRL,1)) bit extraction pattern with BT+{ADC, SBB}.
static SDValue combineAddOrSubToADCOrSBB(bool IsSub, const SDLoc &DL, EVT VT,
SDValue X, SDValue Y,
SelectionDAG &DAG) {
@@ -52306,20 +52304,11 @@ static SDValue combineAddOrSubToADCOrSBB(bool IsSub, const SDLoc &DL, EVT VT,
if (Y.getOpcode() == ISD::ZERO_EXTEND && Y.hasOneUse())
Y = Y.getOperand(0);
- if (!Y.hasOneUse())
+ if (Y.getOpcode() != X86ISD::SETCC || !Y.hasOneUse())
return SDValue();
- X86::CondCode CC;
- SDValue EFLAGS;
- if (Y.getOpcode() == X86ISD::SETCC) {
- CC = (X86::CondCode)Y.getConstantOperandVal(0);
- EFLAGS = Y.getOperand(1);
- } else if (Y.getOpcode() == ISD::AND && isOneConstant(Y.getOperand(1))) {
- EFLAGS = LowerAndToBT(Y, ISD::SETNE, DL, DAG, CC);
- }
-
- if (!EFLAGS)
- return SDValue();
+ X86::CondCode CC = (X86::CondCode)Y.getConstantOperandVal(0);
+ SDValue EFLAGS = Y.getOperand(1);
// If X is -1 or 0, then we have an opportunity to avoid constants required in
// the general case below.
diff --git a/llvm/test/CodeGen/X86/add-sub-bool.ll b/llvm/test/CodeGen/X86/add-sub-bool.ll
index 8acde2cfd6b8e..03c26ba826d24 100644
--- a/llvm/test/CodeGen/X86/add-sub-bool.ll
+++ b/llvm/test/CodeGen/X86/add-sub-bool.ll
@@ -18,16 +18,31 @@ define i32 @test_i32_add_add_idx(i32 %x, i32 %y, i32 %z) nounwind {
; X86-LABEL: test_i32_add_add_idx:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: btl $30, {{[0-9]+}}(%esp)
-; X86-NEXT: adcl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: shrl $30, %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: addl %ecx, %eax
; X86-NEXT: retl
;
-; X64-LABEL: test_i32_add_add_idx:
-; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: btl $30, %edx
-; X64-NEXT: adcl %esi, %eax
-; X64-NEXT: retq
+; NOTBM-LABEL: test_i32_add_add_idx:
+; NOTBM: # %bb.0:
+; NOTBM-NEXT: # kill: def $esi killed $esi def $rsi
+; NOTBM-NEXT: # kill: def $edi killed $edi def $rdi
+; NOTBM-NEXT: leal (%rdi,%rsi), %eax
+; NOTBM-NEXT: shrl $30, %edx
+; NOTBM-NEXT: andl $1, %edx
+; NOTBM-NEXT: addl %edx, %eax
+; NOTBM-NEXT: retq
+;
+; TBM-LABEL: test_i32_add_add_idx:
+; TBM: # %bb.0:
+; TBM-NEXT: # kill: def $esi killed $esi def $rsi
+; TBM-NEXT: # kill: def $edi killed $edi def $rdi
+; TBM-NEXT: bextrl $286, %edx, %eax # imm = 0x11E
+; TBM-NEXT: addl %edi, %eax
+; TBM-NEXT: addl %esi, %eax
+; TBM-NEXT: retq
%add = add i32 %y, %x
%shift = lshr i32 %z, 30
%mask = and i32 %shift, 1
@@ -39,16 +54,31 @@ define i32 @test_i32_add_add_commute_idx(i32 %x, i32 %y, i32 %z) nounwind {
; X86-LABEL: test_i32_add_add_commute_idx:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: btl $2, {{[0-9]+}}(%esp)
-; X86-NEXT: adcl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: shrl $2, %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: addl %ecx, %eax
; X86-NEXT: retl
;
-; X64-LABEL: test_i32_add_add_commute_idx:
-; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: btl $2, %edx
-; X64-NEXT: adcl %esi, %eax
-; X64-NEXT: retq
+; NOTBM-LABEL: test_i32_add_add_commute_idx:
+; NOTBM: # %bb.0:
+; NOTBM-NEXT: # kill: def $esi killed $esi def $rsi
+; NOTBM-NEXT: # kill: def $edi killed $edi def $rdi
+; NOTBM-NEXT: leal (%rdi,%rsi), %eax
+; NOTBM-NEXT: shrl $2, %edx
+; NOTBM-NEXT: andl $1, %edx
+; NOTBM-NEXT: addl %edx, %eax
+; NOTBM-NEXT: retq
+;
+; TBM-LABEL: test_i32_add_add_commute_idx:
+; TBM: # %bb.0:
+; TBM-NEXT: # kill: def $esi killed $esi def $rsi
+; TBM-NEXT: # kill: def $edi killed $edi def $rdi
+; TBM-NEXT: bextrl $258, %edx, %eax # imm = 0x102
+; TBM-NEXT: addl %edi, %eax
+; TBM-NEXT: addl %esi, %eax
+; TBM-NEXT: retq
%add = add i32 %y, %x
%shift = lshr i32 %z, 2
%mask = and i32 %shift, 1
@@ -168,18 +198,29 @@ define i32 @test_i32_add_sub_commute_idx(i32 %x, i32 %y, i32 %z) nounwind {
; X86-LABEL: test_i32_add_sub_commute_idx:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: btl $8, {{[0-9]+}}(%esp)
-; X86-NEXT: adcl $0, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: shrl $8, %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: addl %ecx, %eax
; X86-NEXT: retl
;
-; X64-LABEL: test_i32_add_sub_commute_idx:
-; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: subl %esi, %eax
-; X64-NEXT: btl $8, %edx
-; X64-NEXT: adcl $0, %eax
-; X64-NEXT: retq
+; NOTBM-LABEL: test_i32_add_sub_commute_idx:
+; NOTBM: # %bb.0:
+; NOTBM-NEXT: # kill: def $edx killed $edx def $rdx
+; NOTBM-NEXT: # kill: def $edi killed $edi def $rdi
+; NOTBM-NEXT: subl %esi, %edi
+; NOTBM-NEXT: shrl $8, %edx
+; NOTBM-NEXT: andl $1, %edx
+; NOTBM-NEXT: leal (%rdx,%rdi), %eax
+; NOTBM-NEXT: retq
+;
+; TBM-LABEL: test_i32_add_sub_commute_idx:
+; TBM: # %bb.0:
+; TBM-NEXT: subl %esi, %edi
+; TBM-NEXT: bextrl $264, %edx, %eax # imm = 0x108
+; TBM-NEXT: addl %edi, %eax
+; TBM-NEXT: retq
%sub = sub i32 %x, %y
%shift = lshr i32 %z, 8
%mask = and i32 %shift, 1
@@ -190,20 +231,32 @@ define i32 @test_i32_add_sub_commute_idx(i32 %x, i32 %y, i32 %z) nounwind {
define i32 @test_i32_sub_add_idx(i32 %x, i32 %y, i32 %z) nounwind {
; X86-LABEL: test_i32_sub_add_idx:
; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: btl $1, {{[0-9]+}}(%esp)
-; X86-NEXT: sbbl $0, %eax
+; X86-NEXT: shrl %ecx
+; X86-NEXT: andl $1, %ecx
+; X86-NEXT: subl %ecx, %eax
; X86-NEXT: retl
;
-; X64-LABEL: test_i32_sub_add_idx:
-; X64: # %bb.0:
-; X64-NEXT: # kill: def $esi killed $esi def $rsi
-; X64-NEXT: # kill: def $edi killed $edi def $rdi
-; X64-NEXT: leal (%rdi,%rsi), %eax
-; X64-NEXT: btl $1, %edx
-; X64-NEXT: sbbl $0, %eax
-; X64-NEXT: retq
+; NOTBM-LABEL: test_i32_sub_add_idx:
+; NOTBM: # %bb.0:
+; NOTBM-NEXT: # kill: def $esi killed $esi def $rsi
+; NOTBM-NEXT: # kill: def $edi killed $edi def $rdi
+; NOTBM-NEXT: leal (%rdi,%rsi), %eax
+; NOTBM-NEXT: shrl %edx
+; NOTBM-NEXT: andl $1, %edx
+; NOTBM-NEXT: subl %edx, %eax
+; NOTBM-NEXT: retq
+;
+; TBM-LABEL: test_i32_sub_add_idx:
+; TBM: # %bb.0:
+; TBM-NEXT: # kill: def $esi killed $esi def $rsi
+; TBM-NEXT: # kill: def $edi killed $edi def $rdi
+; TBM-NEXT: leal (%rdi,%rsi), %eax
+; TBM-NEXT: bextrl $257, %edx, %ecx # imm = 0x101
+; TBM-NEXT: subl %ecx, %eax
+; TBM-NEXT: retq
%add = add i32 %y, %x
%shift = lshr i32 %z, 1
%mask = and i32 %shift, 1
@@ -238,16 +291,29 @@ define i32 @test_i32_sub_sub_commute_idx(i32 %x, i32 %y, i32 %z) nounwind {
; X86-LABEL: test_i32_sub_sub_commute_idx:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: btl $15, {{[0-9]+}}(%esp)
-; X86-NEXT: sbbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: shrl $15, %ecx
+; X86-NEXT: andl $1, %ecx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: subl %ecx, %eax
; X86-NEXT: retl
;
-; X64-LABEL: test_i32_sub_sub_commute_idx:
-; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: btl $15, %edx
-; X64-NEXT: sbbl %esi, %eax
-; X64-NEXT: retq
+; NOTBM-LABEL: test_i32_sub_sub_commute_idx:
+; NOTBM: # %bb.0:
+; NOTBM-NEXT: movl %edi, %eax
+; NOTBM-NEXT: shrl $15, %edx
+; NOTBM-NEXT: andl $1, %edx
+; NOTBM-NEXT: subl %esi, %eax
+; NOTBM-NEXT: subl %edx, %eax
+; NOTBM-NEXT: retq
+;
+; TBM-LABEL: test_i32_sub_sub_commute_idx:
+; TBM: # %bb.0:
+; TBM-NEXT: movl %edi, %eax
+; TBM-NEXT: bextrl $271, %edx, %ecx # imm = 0x10F
+; TBM-NEXT: subl %esi, %eax
+; TBM-NEXT: subl %ecx, %eax
+; TBM-NEXT: retq
%shift = lshr i32 %z, 15
%mask = and i32 %shift, 1
%sub0 = sub i32 %x, %y
@@ -288,18 +354,24 @@ define i32 @test_i32_sub_sum_idx(i32 %x, i32 %y, i32 %z) nounwind {
define i32 @test_i32_add_add_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
; X86-LABEL: test_i32_add_add_var:
; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: btl %ecx, %edx
-; X86-NEXT: adcl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: addl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shrl %cl, %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: addl %edx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test_i32_add_add_var:
; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: btl %ecx, %edx
-; X64-NEXT: adcl %esi, %eax
+; X64-NEXT: # kill: def $esi killed $esi def $rsi
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: leal (%rdi,%rsi), %eax
+; X64-NEXT: # kill: def $cl killed $cl killed $ecx
+; X64-NEXT: shrl %cl, %edx
+; X64-NEXT: andl $1, %edx
+; X64-NEXT: addl %edx, %eax
; X64-NEXT: retq
%add = add i32 %y, %x
%shift = lshr i32 %z, %w
@@ -311,18 +383,24 @@ define i32 @test_i32_add_add_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
define i32 @test_i32_add_add_commute_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
; X86-LABEL: test_i32_add_add_commute_var:
; X86: # %bb.0:
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: btl %ecx, %edx
-; X86-NEXT: adcl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: addl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shrl %cl, %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: addl %edx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test_i32_add_add_commute_var:
; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: btl %ecx, %edx
-; X64-NEXT: adcl %esi, %eax
+; X64-NEXT: # kill: def $esi killed $esi def $rsi
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: leal (%rdi,%rsi), %eax
+; X64-NEXT: # kill: def $cl killed $cl killed $ecx
+; X64-NEXT: shrl %cl, %edx
+; X64-NEXT: andl $1, %edx
+; X64-NEXT: addl %edx, %eax
; X64-NEXT: retq
%add = add i32 %y, %x
%shift = lshr i32 %z, %w
@@ -376,20 +454,24 @@ define i64 @test_i64_add_add_var(i64 %x, i64 %y, i64 %z, i64 %w) nounwind {
define i32 @test_i32_add_sub_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
; X86-LABEL: test_i32_add_sub_var:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: btl %ecx, %edx
-; X86-NEXT: adcl $0, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shrl %cl, %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: addl %edx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test_i32_add_sub_var:
; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: subl %esi, %eax
-; X64-NEXT: btl %ecx, %edx
-; X64-NEXT: adcl $0, %eax
+; X64-NEXT: # kill: def $edx killed $edx def $rdx
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: subl %esi, %edi
+; X64-NEXT: # kill: def $cl killed $cl killed $ecx
+; X64-NEXT: shrl %cl, %edx
+; X64-NEXT: andl $1, %edx
+; X64-NEXT: leal (%rdx,%rdi), %eax
; X64-NEXT: retq
%sub = sub i32 %x, %y
%shift = lshr i32 %z, %w
@@ -401,20 +483,24 @@ define i32 @test_i32_add_sub_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
define i32 @test_i32_add_sub_commute_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
; X86-LABEL: test_i32_add_sub_commute_var:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: btl %ecx, %edx
-; X86-NEXT: adcl $0, %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: shrl %cl, %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: addl %edx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test_i32_add_sub_commute_var:
; X64: # %bb.0:
-; X64-NEXT: movl %edi, %eax
-; X64-NEXT: subl %esi, %eax
-; X64-NEXT: btl %ecx, %edx
-; X64-NEXT: adcl $0, %eax
+; X64-NEXT: # kill: def $edx killed $edx def $rdx
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: subl %esi, %edi
+; X64-NEXT: # kill: def $cl killed $cl killed $ecx
+; X64-NEXT: shrl %cl, %edx
+; X64-NEXT: andl $1, %edx
+; X64-NEXT: leal (%rdx,%rdi), %eax
; X64-NEXT: retq
%sub = sub i32 %x, %y
%shift = lshr i32 %z, %w
@@ -426,12 +512,13 @@ define i32 @test_i32_add_sub_commute_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwin
define i32 @test_i32_sub_add_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
; X86-LABEL: test_i32_sub_add_var:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: btl %ecx, %edx
-; X86-NEXT: sbbl $0, %eax
+; X86-NEXT: shrl %cl, %edx
+; X86-NEXT: andl $1, %edx
+; X86-NEXT: subl %edx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test_i32_sub_add_var:
@@ -439,8 +526,10 @@ define i32 @test_i32_sub_add_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
; X64-NEXT: # kill: def $esi killed $esi def $rsi
; X64-NEXT: # kill: def $edi killed $edi def $rdi
; X64-NEXT: leal (%rdi,%rsi), %eax
-; X64-NEXT: btl %ecx, %edx
-; X64-NEXT: sbbl $0, %eax
+; X64-NEXT: # kill: def $cl killed $cl killed $ecx
+; X64-NEXT: shrl %cl, %edx
+; X64-NEXT: andl $1, %edx
+; X64-NEXT: subl %edx, %eax
; X64-NEXT: retq
%add = add i32 %y, %x
%shift = lshr i32 %z, %w
@@ -478,17 +567,22 @@ define i32 @test_i32_sub_sub_commute_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwin
; X86-LABEL: test_i32_sub_sub_commute_var:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT: btl %ecx, %edx
-; X86-NEXT: sbbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: shrl %cl, %edx
+; X86-NEXT: andl $1, %edx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: subl %edx, %eax
; X86-NEXT: retl
;
; X64-LABEL: test_i32_sub_sub_commute_var:
; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
-; X64-NEXT: btl %ecx, %edx
-; X64-NEXT: sbbl %esi, %eax
+; X64-NEXT: # kill: def $cl killed $cl killed $ecx
+; X64-NEXT: shrl %cl, %edx
+; X64-NEXT: andl $1, %edx
+; X64-NEXT: subl %esi, %eax
+; X64-NEXT: subl %edx, %eax
; X64-NEXT: retq
%shift = lshr i32 %z, %w
%mask = and i32 %shift, 1
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