[llvm] 33b214b - [X86] combineSub - fold SUB(X, ADC(Y, 0, W)) -> SBB(X, Y, W)

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-03-24T18:00:00Z
New Revision: 33b214b711d35d98ddba224394817e28e30fbfe6

URL: https://github.com/llvm/llvm-project/commit/33b214b711d35d98ddba224394817e28e30fbfe6
DIFF: https://github.com/llvm/llvm-project/commit/33b214b711d35d98ddba224394817e28e30fbfe6.diff

LOG: [X86] combineSub - fold SUB(X,ADC(Y,0,W)) -> SBB(X,Y,W)

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/add-sub-bool.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index a634574d68271..1670da8d71ab5 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -52986,10 +52986,19 @@ static SDValue combineSub(SDNode *N, SelectionDAG &DAG,
   if (SDValue V = combineToHorizontalAddSub(N, DAG, Subtarget))
     return V;
 
+  // Fold SUB(X,ADC(Y,0,W)) -> SBB(X,Y,W)
+  if (Op1.getOpcode() == X86ISD::ADC && Op1->hasOneUse() &&
+      X86::isZeroNode(Op1.getOperand(1))) {
+    assert(!Op1->hasAnyUseOfValue(1) && "Overflow bit in use");
+    return DAG.getNode(X86ISD::SBB, SDLoc(Op1), Op1->getVTList(), Op0,
+                       Op1.getOperand(0), Op1.getOperand(2));
+  }
+
   // Fold SUB(X,SBB(Y,Z,W)) -> SUB(ADC(X,Z,W),Y)
   // Don't fold to ADC(0,0,W)/SETCC_CARRY pattern which will prevent more folds.
   if (Op1.getOpcode() == X86ISD::SBB && Op1->hasOneUse() &&
       !(X86::isZeroNode(Op0) && X86::isZeroNode(Op1.getOperand(1)))) {
+    assert(!Op1->hasAnyUseOfValue(1) && "Overflow bit in use");
     SDValue ADC = DAG.getNode(X86ISD::ADC, SDLoc(Op1), Op1->getVTList(), Op0,
                               Op1.getOperand(1), Op1.getOperand(2));
     return DAG.getNode(ISD::SUB, SDLoc(N), Op0.getValueType(), ADC.getValue(0),

diff  --git a/llvm/test/CodeGen/X86/add-sub-bool.ll b/llvm/test/CodeGen/X86/add-sub-bool.ll
index dcabb1bd3a151..f93d1598f9aed 100644
--- a/llvm/test/CodeGen/X86/add-sub-bool.ll
+++ b/llvm/test/CodeGen/X86/add-sub-bool.ll
@@ -236,18 +236,15 @@ define i32 @test_i32_sub_add_commute_idx(i32 %x, i32 %y, i32 %z) nounwind {
 ; X86-LABEL: test_i32_sub_add_commute_idx:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    btl $1, {{[0-9]+}}(%esp)
-; X86-NEXT:    adcl $0, %ecx
-; X86-NEXT:    subl %ecx, %eax
+; X86-NEXT:    sbbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_i32_sub_add_commute_idx:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl %edi, %eax
 ; X64-NEXT:    btl $1, %edx
-; X64-NEXT:    adcl $0, %esi
-; X64-NEXT:    subl %esi, %eax
+; X64-NEXT:    sbbl %esi, %eax
 ; X64-NEXT:    retq
   %shift = lshr i32 %z, 1
   %mask = and i32 %shift, 1
@@ -523,23 +520,18 @@ define i32 @test_i32_sub_add_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
 define i32 @test_i32_sub_add_commute_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
 ; X86-LABEL: test_i32_sub_add_commute_var:
 ; X86:       # %bb.0:
-; X86-NEXT:    pushl %esi
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT:    btl %edx, %esi
-; X86-NEXT:    adcl $0, %ecx
-; X86-NEXT:    subl %ecx, %eax
-; X86-NEXT:    popl %esi
+; X86-NEXT:    btl %ecx, %edx
+; X86-NEXT:    sbbl {{[0-9]+}}(%esp), %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: test_i32_sub_add_commute_var:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl %edi, %eax
 ; X64-NEXT:    btl %ecx, %edx
-; X64-NEXT:    adcl $0, %esi
-; X64-NEXT:    subl %esi, %eax
+; X64-NEXT:    sbbl %esi, %eax
 ; X64-NEXT:    retq
   %shift = lshr i32 %z, %w
   %mask = and i32 %shift, 1