[PATCH] D122152: [InstCombine] Fold two select patterns into and-or
chenglin.bi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 22 06:49:13 PDT 2022
bcl5980 added a comment.
In D122152#3399411 <https://reviews.llvm.org/D122152#3399411>, @spatel wrote:
> Does this fix https://github.com/llvm/llvm-project/issues/54313 ?
>
> We need to account for the case where the 'not' is operand 1 of the other bitwise logic op. This won't happen in minimal tests because of commutation canonicalization rules, but you can add tests like this to exercise that path:
>
> declare i1 @gen_i1()
>
> define i1 @and_or1(i1 %a, i1 %b) {
> %c = call i1 @gen_i1()
> %nota = xor i1 %a, true
> %cond = or i1 %c, %nota
> %r = select i1 %cond, i1 %a, i1 %b
> ret i1 %r
> }
I'm trying to fix #54313. Unfortunately only this part can't fix 54313. This code can help to simplify the case to:
define dso_local noundef i1 @"?check4@@YA_N_N000 at Z"(i1 noundef %0, i1 noundef %1, i1 noundef %2, i1 noundef %3) local_unnamed_addr #0 {
%5 = or i1 %2, %3
%6 = or i1 %5, %1
%7 = or i1 %1, %2
%8 = or i1 %7, %3
%9 = xor i1 %8, %6
%10 = and i1 %9, %0
%11 = xor i1 %10, true
ret i1 %11
}
We still need to implement the optimization (a or b) or c == a or (b or c)
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https://reviews.llvm.org/D122152/new/
https://reviews.llvm.org/D122152
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