[llvm] 5a65f0b - [X86][SandyBridge] Remove superfluous mmx store from vector load schedule model group

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 22 03:48:38 PDT 2022


Author: Simon Pilgrim
Date: 2022-03-22T10:48:29Z
New Revision: 5a65f0b4d9fa183fc34412232bdb7bec8b7db7fd

URL: https://github.com/llvm/llvm-project/commit/5a65f0b4d9fa183fc34412232bdb7bec8b7db7fd
DIFF: https://github.com/llvm/llvm-project/commit/5a65f0b4d9fa183fc34412232bdb7bec8b7db7fd.diff

LOG: [X86][SandyBridge] Remove superfluous mmx store from vector load schedule model group

Noticed by D122216

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86SchedSandyBridge.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td
index 3d7fcf8352418..401cb6f29d479 100644
--- a/llvm/lib/Target/X86/X86SchedSandyBridge.td
+++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td
@@ -816,8 +816,7 @@ def SBWriteResGroup48 : SchedWriteRes<[SBPort23]> {
   let NumMicroOps = 1;
   let ResourceCycles = [1];
 }
-def: InstRW<[SBWriteResGroup48], (instrs MMX_MOVD64from64mr,
-                                         VBROADCASTSSrm)>;
+def: InstRW<[SBWriteResGroup48], (instrs VBROADCASTSSrm)>;
 def: InstRW<[SBWriteResGroup48], (instregex "POP(16|32|64)r",
                                             "(V?)MOV64toPQIrm",
                                             "(V?)MOVDDUPrm",


        


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