[PATCH] D121376: [RISCV][RVV] Introduce roundmode operand to PseudoVAADD instruction
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 23 04:25:49 PDT 2022
frasercrmck added inline comments.
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Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:639
}
+ // For Saturating binary operations with mask.
+ // The destination vector type is the same as first source vector.
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Is it worth saying `with mask and rounding-mode operand` to help people differentiate between the intrinsics?
Also this one is defined after the no-roundmode version, but `RISCVSaturatingBinaryRMAAXNoMask` is defined //before// its counterpart. I find that quite confusing.
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Comment at: llvm/lib/Target/RISCV/CMakeLists.txt:29
RISCVInsertVSETVLI.cpp
+ RISCVVXRMRegister.cpp
RISCVInstrInfo.cpp
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Nit: in alphabetical order, please
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Comment at: llvm/lib/Target/RISCV/RISCVVXRMRegister.cpp:21
+//
+// This can be enhanced later if the ABI specify it is volatile across calls.
+//
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specify -> specifies
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Comment at: llvm/lib/Target/RISCV/RISCVVXRMRegister.cpp:101
+ auto NewVXRM = hasVXRMInfo(MI);
+ if (NewVXRM) {
+ unsigned NewVXRMImm = NewVXRM.getValue();
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`if (auto NewVXRM = hasVRXMInfo(MI))`
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Comment at: llvm/lib/Target/RISCV/RISCVVXRMRegister.cpp:151
+ } else {
+ // it is a fallthrou to next block
+ BuildMI(&MBB, MI.getDebugLoc(), TII->get(RISCV::WriteVCSR))
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`fallthrough`
Repository:
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https://reviews.llvm.org/D121376/new/
https://reviews.llvm.org/D121376
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