[PATCH] D122458: [RISCV][WIP] Enable TargetLowering::hasBitTest for masks that fit in ANDI.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 418495.
craig.topper added a comment.

Move tests to new bittest.ll. Add tests of more bit positions.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122458/new/

https://reviews.llvm.org/D122458

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/test/CodeGen/RISCV/bittest.ll
  llvm/test/CodeGen/RISCV/rv32zbs.ll
  llvm/test/CodeGen/RISCV/rv64zbs.ll

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