[llvm] ed51e26 - [X86] combineAddOrSubToADCOrSBB - commute + neg subtraction patterns
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 21 06:55:47 PDT 2022
Author: Simon Pilgrim
Date: 2022-03-21T13:55:35Z
New Revision: ed51e26ab4f077c4ca5cb14fe94b257855b0293f
URL: https://github.com/llvm/llvm-project/commit/ed51e26ab4f077c4ca5cb14fe94b257855b0293f
DIFF: https://github.com/llvm/llvm-project/commit/ed51e26ab4f077c4ca5cb14fe94b257855b0293f.diff
LOG: [X86] combineAddOrSubToADCOrSBB - commute + neg subtraction patterns
Handle SUB(AND(SRL(Y,Z),1),X) -> NEG(SBB(X,0,BT(Y,Z))) folds
I'll address the X86 lost folded-load regressions in a follow-up patch
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/add-sub-bool.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 8c6e9e4c2fb63..8b0d6bd958957 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -52477,9 +52477,13 @@ static SDValue combineAddOrSubToADCOrSBB(SDNode *N, SelectionDAG &DAG) {
if (SDValue ADCOrSBB = combineAddOrSubToADCOrSBB(IsSub, DL, VT, X, Y, DAG))
return ADCOrSBB;
- // If this is an add, commute and try again.
- if (!IsSub)
- return combineAddOrSubToADCOrSBB(IsSub, DL, VT, Y, X, DAG);
+ // Commute and try again (negate the result for subtracts).
+ if (SDValue ADCOrSBB = combineAddOrSubToADCOrSBB(IsSub, DL, VT, Y, X, DAG)) {
+ if (IsSub)
+ ADCOrSBB =
+ DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), ADCOrSBB);
+ return ADCOrSBB;
+ }
return SDValue();
}
diff --git a/llvm/test/CodeGen/X86/add-sub-bool.ll b/llvm/test/CodeGen/X86/add-sub-bool.ll
index a97f293e58968..b5480a1bd383d 100644
--- a/llvm/test/CodeGen/X86/add-sub-bool.ll
+++ b/llvm/test/CodeGen/X86/add-sub-bool.ll
@@ -215,28 +215,19 @@ define i32 @test_i32_sub_sub_idx(i32 %x, i32 %y, i32 %z) nounwind {
; X86-LABEL: test_i32_sub_sub_idx:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: shrl $16, %eax
-; X86-NEXT: andl $1, %eax
-; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: btl $16, {{[0-9]+}}(%esp)
+; X86-NEXT: sbbl $0, %ecx
+; X86-NEXT: subl %ecx, %eax
; X86-NEXT: retl
;
-; NOTBM-LABEL: test_i32_sub_sub_idx:
-; NOTBM: # %bb.0:
-; NOTBM-NEXT: # kill: def $edx killed $edx def $rdx
-; NOTBM-NEXT: # kill: def $edi killed $edi def $rdi
-; NOTBM-NEXT: shrl $16, %edx
-; NOTBM-NEXT: andl $1, %edx
-; NOTBM-NEXT: subl %esi, %edx
-; NOTBM-NEXT: leal (%rdx,%rdi), %eax
-; NOTBM-NEXT: retq
-;
-; TBM-LABEL: test_i32_sub_sub_idx:
-; TBM: # %bb.0:
-; TBM-NEXT: bextrl $272, %edx, %eax # imm = 0x110
-; TBM-NEXT: subl %esi, %eax
-; TBM-NEXT: addl %edi, %eax
-; TBM-NEXT: retq
+; X64-LABEL: test_i32_sub_sub_idx:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: btl $16, %edx
+; X64-NEXT: sbbl $0, %esi
+; X64-NEXT: subl %esi, %eax
+; X64-NEXT: retq
%shift = lshr i32 %z, 16
%mask = and i32 %shift, 1
%sub0 = sub i32 %y, %mask
@@ -436,23 +427,23 @@ define i32 @test_i32_sub_add_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
define i32 @test_i32_sub_sub_var(i32 %x, i32 %y, i32 %z, i32 %w) nounwind {
; X86-LABEL: test_i32_sub_sub_var:
; X86: # %bb.0:
-; X86-NEXT: movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: shrl %cl, %eax
-; X86-NEXT: andl $1, %eax
-; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT: btl %edx, %esi
+; X86-NEXT: sbbl $0, %ecx
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: popl %esi
; X86-NEXT: retl
;
; X64-LABEL: test_i32_sub_sub_var:
; X64: # %bb.0:
-; X64-NEXT: # kill: def $edx killed $edx def $rdx
-; X64-NEXT: # kill: def $edi killed $edi def $rdi
-; X64-NEXT: # kill: def $cl killed $cl killed $ecx
-; X64-NEXT: shrl %cl, %edx
-; X64-NEXT: andl $1, %edx
-; X64-NEXT: subl %esi, %edx
-; X64-NEXT: leal (%rdx,%rdi), %eax
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: btl %ecx, %edx
+; X64-NEXT: sbbl $0, %esi
+; X64-NEXT: subl %esi, %eax
; X64-NEXT: retq
%shift = lshr i32 %z, %w
%mask = and i32 %shift, 1
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