[PATCH] D122213: [RISCV] Enable MachineOutliner by default under -Oz for RISCV

Wang Pengcheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 22 01:19:45 PDT 2022


pcwang-thead created this revision.
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Enable default outlining when the function has the minsize attribute.

`addr-label.ll` crashed after enabling this, so a barrier is added before
instruction selection as a workaround.

Additionally, we filter out instructions which contain unsafe things like
FrameIndex. Besides, we saw a failure caused by unwinding with incomplete
CFIs, so we can't outline CFI instructions when they are needed in EH.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D122213

Files:
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfo.h
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/O3-pipeline.ll

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