The Week Of Monday 12 May 2025 Archives by date

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Starting: Mon May 12 00:13:37 PDT 2025
Ending: Mon May 12 07:15:02 PDT 2025
Messages: 419

• [llvm] [X86][AVX10] Fix assertion with strict fcmp (PR #139500)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU][Verifier] Allow llvm.amdgcn.unreachable after cs.chain (PR #139494)   Robert Imschweiler via llvm-commits
• [llvm] [NFC][TableGen] Code cleanup in Record.h/cpp (PR #138876)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU][Verifier] Allow llvm.amdgcn.unreachable after cs.chain (PR #139494)   Jay Foad via llvm-commits
• [llvm] [X86][APX] Fix issues of suppressing APX for relocation (PR #139285)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Fix issues of suppressing APX for relocation (PR #139285)   Phoebe Wang via llvm-commits
• [llvm] [SPIRV] Added support for extension SPV_INTEL_fpga_buffer_location (PR #133679)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Added support for extension SPV_INTEL_fpga_buffer_location (PR #133679)   Aadesh Premkumar via llvm-commits
• [llvm] [SPIRV] Added support for extension SPV_INTEL_fpga_buffer_location (PR #133679)   Aadesh Premkumar via llvm-commits
• [llvm] Support for extension SPV_INTEL_latency_control. (PR #133397)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Iris Shi via llvm-commits
• [llvm] [TTI][LV] Simplify the prototype of preferPredicatedReductionSelect. nfc (PR #139265)   Mel Chen via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] [SPIRV] Support for the extension SPV_INTEL_blocking_pipes (PR #138675)   Aadesh Premkumar via llvm-commits
• [llvm] [MachineOutliner] Preserve regmasks in calls to outlined functions (PR #120940)   Zhaoxuan Jiang via llvm-commits
• [llvm] 47ce75e - [Hexagon] Use TargetInstrInfo::RegSubRegPair (#138637)   via llvm-commits
• [llvm] [Hexagon] Use TargetInstrInfo::RegSubRegPair (PR #138637)   Sudharsan Veeravalli via llvm-commits
• [llvm] [InstCombine] Introduce `foldICmpBinOpWithConstantViaTruthTable` folding (PR #139109)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Introduce `foldICmpBinOpWithConstantViaTruthTable` folding (PR #139109)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Introduce `foldICmpBinOpWithConstantViaTruthTable` folding (PR #139109)   Nikita Popov via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   David Green via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   David Green via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   David Green via llvm-commits
• [llvm] [AArch64] Null check TargetStreamer before emitting .variant_pcs (PR #138924)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Null check TargetStreamer before emitting .variant_pcs (PR #138924)   Sander de Smalen via llvm-commits
• [llvm] Create a CharSetConverter class with both iconv and icu support. (PR #138893)   via llvm-commits
• [llvm] [AMDGPU] Move kernarg preload logic to separate pass (PR #130434)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Iris Shi via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Move kernarg preload logic to separate pass (PR #130434)   LLVM Continuous Integration via llvm-commits
• [llvm] [LLVM][Transforms] Add unit test for resolved cloning bug (PR #139223)   Christian Ulmann via llvm-commits
• [llvm] [AMDGPU][Verifier] Allow llvm.amdgcn.unreachable after cs.chain (PR #139494)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Enable verifyInstructionPredicates (PR #139262)   David Green via llvm-commits
• [llvm] 3c03108 - [ARM] Enable verifyInstructionPredicates (#139262)   via llvm-commits
• [llvm] [ARM] Enable verifyInstructionPredicates (PR #139262)   David Green via llvm-commits
• [llvm] 4b89339 - AMDGPU: Reorganize fmed3 intrinsic instcombine tests (#139498)   via llvm-commits
• [llvm] AMDGPU: Reorganize fmed3 intrinsic instcombine tests (PR #139498)   Matt Arsenault via llvm-commits
• [llvm] [KeyInstr][DwarfDebug] Add is_stmt emission support (PR #133495)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [X86][APX] Fix issues of suppressing APX for relocation (PR #139285)   Feng Zou via llvm-commits
• [clang] [llvm] [AArch64] Fix feature list for FUJITSU-MONAKA processor (PR #139212)   David Green via llvm-commits
• [llvm] 63f3a5b - [PhaseOrdering][X86] Add test coverage for #48223   Simon Pilgrim via llvm-commits
• [llvm] [IR] Avoid UB in `SymbolTableListTraits` (PR #139096)   Yingwei Zheng via llvm-commits
• [llvm] MachineScheduler: Reset next cluster candidate for each node (PR #139513)   via llvm-commits
• [llvm] MachineScheduler: Reset next cluster candidate for each node (PR #139513)   via llvm-commits
• [llvm] MachineScheduler: Reset next cluster candidate for each node (PR #139513)   via llvm-commits
• [llvm] [VPlan] Implement VPExtendedReduction, VPMulAccumulateReductionRecipe and corresponding vplan transformations. (PR #137746)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement VPExtendedReduction, VPMulAccumulateReductionRecipe and corresponding vplan transformations. (PR #137746)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Implement VPExtendedReduction, VPMulAccumulateReductionRecipe and corresponding vplan transformations. (PR #137746)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)   Sander de Smalen via llvm-commits
• [llvm] MachineScheduler: Improve instruction clustering (PR #137784)   via llvm-commits
• [llvm] [NVPTX] Add TMA Bulk Copy Intrinsics (PR #138679)   Durgadoss R via llvm-commits
• [llvm] [Dwarf] Emit `DW_AT_bit_size` for non-byte-sized types (PR #137118)   Yingwei Zheng via llvm-commits
• [llvm] [AArch64] Stop reserved registers from being saved in prolog/epilog (PR #138448)   Peter Smith via llvm-commits
• [llvm] [FuzzMutate] Prevent the mutator from generating invalid IR caused by non-callable CCs (PR #139080)   Manuel Carrasco via llvm-commits
• [llvm] [FuzzMutate] Match the callee's and callsite's calling conventions. (PR #139100)   Manuel Carrasco via llvm-commits
• [llvm] IR: Reorder ConstantData enum values (PR #138638)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Handle early exit before forming regions. (NFC) (PR #138393)   David Sherwood via llvm-commits
• [llvm] [RISCV] Emit .note.gnu.property section when Zicfiss-based shadow stack is enabled (PR #127036)   Kito Cheng via llvm-commits
• [llvm] [VPlan] Verify dominance for incoming values of phi-like recipes. (PR #124838)   David Sherwood via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Iris Shi via llvm-commits
• [lld] [LLD][ELF][RISCV] Handle .note.gnu.property sections for Zicfilp/Zicfiss features (PR #127193)   Kito Cheng via llvm-commits
• [llvm] [TTI][LV] Simplify the prototype of preferPredicatedReductionSelect. nfc (PR #139265)   David Sherwood via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Iris Shi via llvm-commits
• [llvm] [AMDGPU][Verifier] Allow llvm.amdgcn.unreachable after cs.chain (PR #139494)   Carl Ritson via llvm-commits
• [compiler-rt] [compiler-rt][AArch64] Provide basic implementations of SME memcpy/memmove in case of strictly aligned memory access (PR #138250)   David Sherwood via llvm-commits
• [compiler-rt] [compiler-rt][AArch64] Provide basic implementations of SME memcpy/memmove in case of strictly aligned memory access (PR #138250)   David Sherwood via llvm-commits
• [compiler-rt] [compiler-rt][AArch64] Provide basic implementations of SME memcpy/memmove in case of strictly aligned memory access (PR #138250)   David Sherwood via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Pengcheng Wang via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] 9e27db0 - [RISCV] Add Andes XAndesVPackFPH (Andes Vector Packed FP16) extension. (#138827)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVPackFPH (Andes Vector Packed FP16) extension. (PR #138827)   Jim Lin via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] [llvm][DebugInfo] Drop \01 mangling prefix when inserting linkage name into accelerator table (PR #138852)   Pavel Labath via llvm-commits
• [llvm] [AMDGPU] IGLP: Fixes for VMEM load detection and unsigned int handling (PR #135090)   Robert Imschweiler via llvm-commits
• [lld] [lld] Merge equivalent symbols found during ICF (PR #134342)   Hans Wennborg via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Iris Shi via llvm-commits
• [llvm] [SelectionDAG] Convert to or mask if all insertions are -1 (PR #138213)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Convert to or mask if all insertions are -1 (PR #138213)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Convert to or mask if all insertions are -1 (PR #138213)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Convert to or mask if all insertions are -1 (PR #138213)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support for Q extension (PR #139369)   Iris Shi via llvm-commits
• [llvm] [RISCV] Use QC_E_ADDI while eliminating the frameindex (PR #139515)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Use QC_E_ADDI while eliminating the frameindex (PR #139515)   via llvm-commits
• [llvm] [CodeGen] For ad hoc aliasing, additional regUnits are needed to fix lanemask representation (PR #139206)   Vikash Gupta via llvm-commits
• [llvm] [CodeGen][NPM] Support CodeGenSCCOrder in pipeline (PR #136818)   Akshat Oke via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] [CodeGen] For ad hoc aliasing, additional regUnits are needed to fix lanemask representation (PR #139206)   Vikash Gupta via llvm-commits
• [llvm] [TableGen][MacroFusion] Predicate if the first inst has the same register (PR #137778)   Pengcheng Wang via llvm-commits
• [llvm] [llvm][docs] Improve usage note on stacked PRs (PR #138949)   Andrzej Warzyński via llvm-commits
• [llvm] [TableGen][MacroFusion] Predicate if the first inst has the same register (PR #137778)   Pengcheng Wang via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [llvm] 7d867c6 - [LoopVersioningLICM] Only mark pointers with generated checks as noalias (#135168)   via llvm-commits
• [llvm] [LoopVersioningLICM] Only mark pointers with generated checks as noalias (PR #135168)   John Brawn via llvm-commits
• [compiler-rt] [tsan] Fix nested signal handling (PR #138599)   Dmitry Vyukov via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm] Support multiple save/restore points in mir (PR #119357)   Elizaveta Noskova via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVPackFPH (Andes Vector Packed FP16) extension. (PR #138827)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Anatoly Trosinenko via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Anatoly Trosinenko via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Anatoly Trosinenko via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Anatoly Trosinenko via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Anatoly Trosinenko via llvm-commits
• [clang] [llvm] [RISCV] Add Andes XAndesVPackFPH (Andes Vector Packed FP16) extension. (PR #138827)   LLVM Continuous Integration via llvm-commits
• [llvm] 688bccb - [TTI][LV] Simplify the prototype of preferPredicatedReductionSelect. nfc (#139265)   via llvm-commits
• [llvm] [TTI][LV] Simplify the prototype of preferPredicatedReductionSelect. nfc (PR #139265)   Mel Chen via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   Iris Shi via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   Iris Shi via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   via llvm-commits
• [llvm] [TTI][LV] Simplify the prototype of preferPredicatedReductionSelect. nfc (PR #139265)   LLVM Continuous Integration via llvm-commits
• [llvm] [GISel][AArch64] Added more efficient lowering of Bitreverse (PR #139233)   via llvm-commits
• [llvm] 4e53560 - [AMDGPU] ashr.v2i16.ll - regenerate to match shl/lshr v2i16 test coverage   Simon Pilgrim via llvm-commits
• [llvm] d27d0c7 - [X86] atomic-load-store.ll - add SSE/AVX level coverage for future vector atomic memory operations   Simon Pilgrim via llvm-commits
• [llvm] af03d6b - [AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)   via llvm-commits
• [clang] [llvm] [AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (PR #139236)   Ricardo Jesus via llvm-commits
• [llvm] [LoopVersioningLICM] Only mark pointers with generated checks as noalias (PR #135168)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86][AVX10] Fix assertion with strict fcmp (PR #139500)   Simon Pilgrim via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] [AArch64] Reduce the cost of repeated sub-shuffle (PR #139331)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Reduce the cost of repeated sub-shuffle (PR #139331)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Reduce the cost of repeated sub-shuffle (PR #139331)   Sam Tebbs via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   Pengcheng Wang via llvm-commits
• [llvm] [AArch64] Reduce the cost of repeated sub-shuffle (PR #139331)   Cullen Rhodes via llvm-commits
• [llvm] 2ec13c5 - [AArch64][SVE] Add patterns for bit-select instructions. (#138689)   via llvm-commits
• [llvm] [AArch64][SVE] Add patterns for bit-select instructions. (PR #138689)   Ricardo Jesus via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   via llvm-commits
• [llvm] [HWASan] personality-thunk should inherit BTI/GCS/PAC flags via createWithDefaultAttr (PR #139216)   via llvm-commits
• [llvm] [HWASan] personality-thunk should inherit BTI/GCS/PAC flags via createWithDefaultAttr (PR #139216)   via llvm-commits
• [llvm] [SPIRV]Added support for extension SPV_INTEL_arbitrary_precision_fixed_point (PR #136085)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [IR] Strip dead code post ConstExpr removals (NFC) (PR #139524)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IR] Strip dead code post ConstExpr removals (NFC) (PR #139524)   via llvm-commits
• [llvm] [LV] Improve code in selectInterleaveCount (NFC) (PR #128002)   Ramkumar Ramachandra via llvm-commits
• [llvm] [TableGen][CodeGen] Give every leaf register a unique regunit (PR #139526)   Jay Foad via llvm-commits
• [llvm] [TableGen][CodeGen] Give every leaf register a unique regunit (PR #139526)   via llvm-commits
• [llvm] [TableGen][CodeGen] Give every leaf register a unique regunit (PR #139526)   Jay Foad via llvm-commits
• [llvm] [CodeGen] For ad hoc aliasing, additional regUnits are needed to fix lanemask representation (PR #139206)   Jay Foad via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #137813)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #137813)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Option --combiner-select-seq (PR #134813)   via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Carlos Alberto Enciso via llvm-commits
• [llvm] AMDGPU: Add more tests for fmed3 instcombine folds (PR #139529)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more tests for fmed3 instcombine folds (PR #139529)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more tests for fmed3 instcombine folds (PR #139529)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add more tests for fmed3 instcombine folds (PR #139529)   via llvm-commits
• [llvm] Removed redundant assert and condition in APInt::SetBits (PR #138038)   Simon Pilgrim via llvm-commits
• [llvm] [LV][LAA]Add initial support for non-power-of-2 store-load forwarding distance (PR #137873)   Alexey Bataev via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #137813)   Rohit Aggarwal via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #137813)   Rohit Aggarwal via llvm-commits
• [llvm] Removed redundant assert and condition in APInt::SetBits (PR #138038)   Jay Foad via llvm-commits
• [llvm] [SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (PR #129689)   Marcos Maronas via llvm-commits
• [llvm] [SLP] Fix incorrect operand order in interchangeable instruction. (PR #139225)   Alexey Bataev via llvm-commits
• [llvm] [RISCV] Handle more (add x, C) -> (sub x, -C) cases (PR #138705)   Piotr Fusik via llvm-commits
• [llvm] [RISCV] Handle more (add x, C) -> (sub x, -C) cases (PR #138705)   Piotr Fusik via llvm-commits
• [llvm] [SPIRV] Support for the extension SPV_INTEL_blocking_pipes (PR #138675)   Aadesh Premkumar via llvm-commits
• [llvm] [RISCV] Handle more (add x, C) -> (sub x, -C) cases (PR #138705)   Piotr Fusik via llvm-commits
• [compiler-rt] [tsan] Fix nested signal handling (PR #138599)   Jakob Widauer via llvm-commits
• [llvm] [SPIRV] Change how to detect OpenCL/Vulkan Env and update tests accordingly. (PR #129689)   Marcos Maronas via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Javier Lopez-Gomez via llvm-commits
• [llvm] [LAA] Improve code in replaceSymbolicStrideSCEV (NFC) (PR #139532)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Improve code in replaceSymbolicStrideSCEV (NFC) (PR #139532)   via llvm-commits
• [llvm] [llvm][DebugInfo] Drop \01 mangling prefix when inserting linkage name into accelerator table (PR #138852)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Drop \01 mangling prefix when inserting linkage name into accelerator table (PR #138852)   Michael Buch via llvm-commits
• [llvm] 292cfa7 - [LLVM][Transforms] Add unit test for resolved cloning bug (#139223)   via llvm-commits
• [llvm] [LLVM][Transforms] Add unit test for resolved cloning bug (PR #139223)   Christian Ulmann via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Carlos Alberto Enciso via llvm-commits
• [llvm] [InstCombine][DebugInfo] Update debug value uses in `freelyInvertAllUsersOf` (PR #137013)   Yingwei Zheng via llvm-commits
• [llvm] [IVSimplify] Improve code in isLoopCounter (NFC) (PR #139533)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVSimplify] Improve code in isLoopCounter (NFC) (PR #139533)   via llvm-commits
• [llvm] [LLVM][Transforms] Add unit test for resolved cloning bug (PR #139223)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [NVPTX] Add errors for incorrect CUDA addrpaces (PR #138706)   Lewis Crawford via llvm-commits
• [llvm] [GISel][AArch64] Added more efficient lowering of Bitreverse (PR #139233)   David Green via llvm-commits
• [llvm] [LAA][NFC] Unify naming of DepCandidates to DependentAccesses (PR #139534)   Igor Kirillov via llvm-commits
• [llvm] [LAA][NFC] Unify naming of DepCandidates to DependentAccesses (PR #139534)   via llvm-commits
• [llvm] f1043b1 - [AMDGPU] combine_vloads.ll regenerate test checks   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace VPRegionBlock with explicit CFG before execute (NFCI). (PR #117506)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   via llvm-commits
• [llvm] [LLVM][SelectionDAG] Simplify SplitVecOp_VSETCC. (PR #139295)   Paul Walker via llvm-commits
• [llvm] [RISCV] Remove`riscv.segN.load/store` in favor of their mask variants (PR #137045)   Harald van Dijk via llvm-commits
• [llvm] [LLVM][SelectionDAG] Simplify SplitVecOp_VSETCC. (PR #139295)   Paul Walker via llvm-commits
• [clang] [llvm] [NVPTX] Add errors for incorrect CUDA addrpaces (PR #138706)   Lewis Crawford via llvm-commits
• [llvm] [LAA] Improve code in replaceSymbolicStrideSCEV (NFC) (PR #139532)   Florian Hahn via llvm-commits
• [llvm] [CodeGen] For ad hoc aliasing, additional regUnits are needed to fix lanemask representation (PR #139206)   Vikash Gupta via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   Pengcheng Wang via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] 2f55123 - [VPlan] Handle early exit before forming regions. (NFC) (#138393)   via llvm-commits
• [llvm] [VPlan] Handle early exit before forming regions. (NFC) (PR #138393)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] [TableGen][CodeGen] Give every leaf register a unique regunit (PR #139526)   Vikash Gupta via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add `zihintpause` LLVM/Clang intrinsic (PR #139519)   Pengcheng Wang via llvm-commits
• [llvm] 53df640 - [SLP] Fix incorrect operand order in interchangeable instruction. (#139225)   via llvm-commits
• [llvm] [SLP] Fix incorrect operand order in interchangeable instruction. (PR #139225)   Han-Kuan Chen via llvm-commits
• [llvm] [LoopIdiom] Improve code; use SCEVPatternMatch (NFC) (PR #139540)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Improve code; use SCEVPatternMatch (NFC) (PR #139540)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Javier Lopez-Gomez via llvm-commits
• [clang] [flang] [llvm] [openmp] [Clang][OpenMP][LoopTransformations] Add support for "#pragma omp fuse" loop transformation directive and "looprange" clause (PR #139293)   Michael Kruse via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Javier Lopez-Gomez via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Support DW_TAG_module (PR #137228)   Javier Lopez-Gomez via llvm-commits
• [llvm] [AArch64][SVE] Add patterns for bit-select instructions. (PR #138689)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Fix a couple of unhandled DWARF situations leading to a crash (PR #137221)   Javier Lopez-Gomez via llvm-commits
• [llvm] [CodeGenPrepare] Make sure instruction get from SunkAddrs is before MemoryInst (PR #139303)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   via llvm-commits
• [llvm] [CodeGenPrepare] Make sure instruction get from SunkAddrs is before MemoryInst (PR #139303)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Frederik Harwath via llvm-commits
• [llvm] 3ffde4a - [APInt] Removed redundant assert and condition in APInt::SetBits (#138038)   via llvm-commits
• [llvm] [IR] Add CallBr intrinsics support (PR #133907)   Robert Imschweiler via llvm-commits
• [llvm] Removed redundant assert and condition in APInt::SetBits (PR #138038)   Simon Pilgrim via llvm-commits
• [llvm] Removed redundant assert and condition in APInt::SetBits (PR #138038)   via llvm-commits
• [llvm] [MachineOutliner] Preserve regmasks in calls to outlined functions (PR #120940)   Zhaoxuan Jiang via llvm-commits
• [llvm] [LoopInterchange] Exit early in certain cases in legality check (NFC) (PR #139254)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Exit early in certain cases in legality check (NFC) (PR #139254)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Exit early in certain cases in legality check (NFC) (PR #139254)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Exit early in certain cases in legality check (NFC) (PR #139254)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Exit early in certain cases in legality check (NFC) (PR #139254)   Michael Kruse via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] cede236 - [llvm][DebugInfo] Drop \01 mangling prefix when inserting linkage name into accelerator table (#138852)   via llvm-commits
• [llvm] [DAGCombiner] Fold pattern for srl-shl-zext (PR #138290)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][DebugInfo] Drop \01 mangling prefix when inserting linkage name into accelerator table (PR #138852)   Michael Buch via llvm-commits
• [llvm] [DAGCombiner] Fold pattern for srl-shl-zext (PR #138290)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold pattern for srl-shl-zext (PR #138290)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold pattern for srl-shl-zext (PR #138290)   Simon Pilgrim via llvm-commits
• [llvm] [SystemZ] Add proper mcount handling (PR #135767)   Simon Pilgrim via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [LoopInterchange] Exit early in certain cases in legality check (NFC) (PR #139254)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] Create a CharSetConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Matt Arsenault via llvm-commits
• [llvm] [LAA][NFC] Unify naming of DepCandidates to DependentAccesses (PR #139534)   David Sherwood via llvm-commits
• [llvm] [LLVM][SelectionDAG] Simplify SplitVecOp_VSETCC. (PR #139295)   Matt Arsenault via llvm-commits
• [llvm] Create a CharSetConverter class with both iconv and icu support. (PR #138893)   via llvm-commits
• [llvm] [LoopInterchange] Exit early in certain cases in legality check (NFC) (PR #139254)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer_common] Alter sanitizer_set_report_path_test to not assume a fixed file path (PR #139282)   Dan Blackwell via llvm-commits
• [llvm] [AMDGPU][Verifier] Allow llvm.amdgcn.unreachable after cs.chain (PR #139494)   Matt Arsenault via llvm-commits
• [llvm] [LoopInterchange] Exit early in certain cases in legality check (NFC) (PR #139254)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Skip legality check if surronding loops already guarantee dependency (NFC) (PR #139254)   Ryotaro Kasuga via llvm-commits
• [llvm] Create a CharSetConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] [LoopInterchange] Skip legality check if surrounding loops already guarantee dependency (NFC) (PR #139254)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] [LoopInterchange] Skip legality check if surrounding loops already guarantee dependency (NFC) (PR #139254)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Frederik Harwath via llvm-commits
• [llvm] [LoopInterchange] Skip legality check if surrounding loops already guarantee dependency (NFC) (PR #139254)   Michael Kruse via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Matt Arsenault via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   Abhilash Majumder via llvm-commits
• [llvm] [X86][APX] Fix issues of suppressing APX for relocation (PR #139285)   Feng Zou via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   via llvm-commits
• [llvm] 80547cd - [X86][APX] Fix issues of suppressing APX for relocation (#139285)   via llvm-commits
• [llvm] [X86][APX] Fix issues of suppressing APX for relocation (PR #139285)   Feng Zou via llvm-commits
• [llvm] 980a7e7 - [X86][AVX10] Fix assertion with strict fcmp (#139500)   via llvm-commits
• [llvm] [X86][AVX10] Fix assertion with strict fcmp (PR #139500)   Feng Zou via llvm-commits
• [llvm] 2de0c92 - [X86] Use X86 check prefix for 32-bit instead of X32 in tail call tests. NFC.   Simon Pilgrim via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Javier Lopez-Gomez via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OpenMP] Support translation for linear clause in omp.wsloop (PR #139386)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OpenMP] Support translation for linear clause in omp.wsloop (PR #139386)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OpenMP] Support translation for linear clause in omp.wsloop (PR #139386)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OpenMP] Support translation for linear clause in omp.wsloop (PR #139386)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OpenMP] Support translation for linear clause in omp.wsloop (PR #139386)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OpenMP] Support translation for linear clause in omp.wsloop (PR #139386)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OpenMP] Support translation for linear clause in omp.wsloop (PR #139386)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OpenMP] Support translation for linear clause in omp.wsloop (PR #139386)   Tom Eccles via llvm-commits
• [llvm] Create a CharSetConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] [VPlan] Move predication to VPlanTransform (NFC). (PR #128420)   Florian Hahn via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Support MLIR lowering of linear clause for omp.wsloop (PR #139385)   Tom Eccles via llvm-commits
• [llvm] [X86][APX] Fix issues of suppressing APX for relocation (PR #139285)   Shengchen Kan via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Fix cndmask vcc use for wave32 (PR #139541)   Frederik Harwath via llvm-commits
• [llvm] [NVPTX] Add ptxas verification and kernel test to sm-version test (PR #139543)   Puja Saha via llvm-commits
• [llvm] [NVPTX] Add ptxas verification and kernel test to sm-version test (PR #139543)   via llvm-commits
• [llvm] [NVPTX] Add ptxas verification and kernel test to sm-version test (PR #139543)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Carlos Alberto Enciso via llvm-commits
• [llvm] [LAA][NFC] Unify naming of DepCandidates to DependentAccesses (PR #139534)   Florian Hahn via llvm-commits
• [llvm] Create a EncodingConverter class with both iconv and icu support. (PR #138893)   Abhina Sree via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Carlos Alberto Enciso via llvm-commits
• [llvm] Allow multi-member variants in DWARF (PR #139300)   Tom Tromey via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Simon Pilgrim via llvm-commits
• [llvm] c1e678b - [LAA] Improve code in replaceSymbolicStrideSCEV (NFC) (#139532)   via llvm-commits
• [llvm] [LAA] Improve code in replaceSymbolicStrideSCEV (NFC) (PR #139532)   Ramkumar Ramachandra via llvm-commits
• [llvm] [GISel] Add KnownFPClass Analysis to GISelValueTrackingPass (PR #134611)   Tim Gymnich via llvm-commits
• [llvm] [CoroEarly] Hide promise alloca for later passes (PR #139243)   Weibo He via llvm-commits
• [llvm] [GISel][AArch64] Added more efficient lowering of Bitreverse (PR #139233)   via llvm-commits
• [llvm] [IA] Add support for [de]interleave{3,5,7} (PR #139373)   Luke Lau via llvm-commits
• [llvm] [IA] Add support for [de]interleave{3,5,7} (PR #139373)   via llvm-commits
• [llvm] [X86][APX] Fix issues of suppressing APX for relocation (PR #139285)   Feng Zou via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   David Green via llvm-commits
• [llvm] [APInt] Added APInt::clearBits() method (PR #137098)   Jay Foad via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld* patterns to reduce codegen regressions (PR #135492)   David Green via llvm-commits
• [llvm] [CoroEarly] Hide promise alloca for later passes (PR #139243)   Weibo He via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add symbol for debugger with VTable information. (PR #130255)   Tom Tromey via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPlan operand order for VPBlendRecipes. (PR #139475)   Florian Hahn via llvm-commits
• [llvm] MachineScheduler: Improve instruction clustering (PR #137784)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for DWARF `DW_AT_byte_size` (PR #139110)   Carlos Alberto Enciso via llvm-commits
• [llvm] Reapply "[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (#125885)" (PR #139548)   Lucas Ramirez via llvm-commits
• [llvm] Reapply "[AMDGPU][Scheduler] Refactor ArchVGPR rematerialization during scheduling (#125885)" (PR #139548)   via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   via llvm-commits
• [llvm] [llvm-exegesis][AArch64] Check for PAC keys before disabling them (PR #138643)   David Green via llvm-commits
• [llvm] [NVPTX] Add ptxas verification and kernel test to sm-version test (PR #139543)   Abhilash Majumder via llvm-commits
• [llvm] [NVPTX] Add ptxas verification and kernel test to sm-version test (PR #139543)   Abhilash Majumder via llvm-commits
• [llvm] [DAGCombiner] Fold pattern for srl-shl-zext (PR #138290)   Alexander Peskov via llvm-commits
• [llvm] [NVPTX] Add ptxas verification and kernel test to sm-version test (PR #139543)   Abhilash Majumder via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold pattern for srl-shl-zext (PR #138290)   Alexander Peskov via llvm-commits
• [llvm] [DAGCombiner] Fold pattern for srl-shl-zext (PR #138290)   Alexander Peskov via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #137813)   Rohit Aggarwal via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [PowerPC] frontend get target feature from backend with cpu name (PR #137670)   zhijian lin via llvm-commits
• [llvm] [CoroEarly] Hide promise alloca for later passes (PR #139243)   Weibo He via llvm-commits
• [llvm] 2e13f7a - [SLP][NFC]Add a test with the incorrect vectorization for the pointers with distance difference > 2^32   Alexey Bataev via llvm-commits
• [llvm] [DTLTO][LLVM] Integrated Distributed ThinLTO (DTLTO) (PR #127749)   via llvm-commits
• [llvm] [SDAG] Make Select-with-Identity-Fold More Flexible; NFC (PR #136554)   Simon Pilgrim via llvm-commits
• [llvm] [PowerPC] catch v2i64 shift left by 1 is add case (PR #138772)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] catch v2i64 shift left by 1 is add case (PR #138772)   Amy Kwan via llvm-commits
• [llvm] [PowerPC] catch v2i64 shift left by 1 is add case (PR #138772)   Amy Kwan via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #137813)   Rohit Aggarwal via llvm-commits
• [llvm] d39ca81 - [LoopPeel] Add initial tests for peeling the last iteration.   Florian Hahn via llvm-commits
• [llvm] [DA] do not handle array accesses of different offsets (PR #123436)   Michael Kruse via llvm-commits
• [llvm] [DA] do not handle array accesses of different offsets (PR #123436)   Michael Kruse via llvm-commits
• [llvm] [DA] do not handle array accesses of different offsets (PR #123436)   Michael Kruse via llvm-commits
• [llvm] [DA] do not handle array accesses of different offsets (PR #123436)   Michael Kruse via llvm-commits
• [llvm] [X86][SelectionDAG] Fix the Gather's base and index by modifying the Scale value (PR #137813)   Rohit Aggarwal via llvm-commits
• [llvm] [LoopPeel] Implement initial peeling off the last loop iteration. (PR #139551)   Florian Hahn via llvm-commits
• [llvm] [LAA] Improve code in replaceSymbolicStrideSCEV (NFC) (PR #139532)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoopPeel] Implement initial peeling off the last loop iteration. (PR #139551)   via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (PR #137331)   Simon Pilgrim via llvm-commits
• [llvm] [IR][DSE] Support non-malloc functions in malloc+memset->calloc fold (PR #138299)   via llvm-commits
• [llvm] [LoopVectorizer] Prune VFs based on plan register pressure (PR #132190)   Sam Tebbs via llvm-commits
• [llvm] [IR][DSE] Support non-malloc functions in malloc+memset->calloc fold (PR #138299)   via llvm-commits
• [llvm] [NVPTX] Add ptxas verification and kernel test to sm-version test (PR #139543)   Puja Saha via llvm-commits
• [llvm] [LAA][NFC] Unify naming of DepCandidates to DependentAccesses (PR #139534)   Igor Kirillov via llvm-commits
• [llvm] [MC][DebugInfo] Emit linetable entries with known offsets immediately (PR #134677)   Jeremy Morse via llvm-commits
• [llvm] [MC][DebugInfo] Emit linetable entries with known offsets immediately (PR #134677)   Jeremy Morse via llvm-commits
• [llvm] [RISCV] Remove`riscv.segN.load/store` in favor of their mask variants (PR #137045)   Luke Lau via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Initial defaultmap implementation (PR #135226)   via llvm-commits
• [llvm] [InstCombine] Pull shuffles out of binops with splatted ops (PR #137948)   Luke Lau via llvm-commits
• [llvm] [VectorCombine][X86] Use updated getVectorInstrCost hook (PR #137823)   Luke Lau via llvm-commits
• [llvm] [polly] Reapply "IR: Remove uselist for constantdata (#137313)" (PR #138961)   Hans Wennborg via llvm-commits
• [llvm] [LAA]Fix implicit trunc from int64 to int and losing info (PR #139553)   Alexey Bataev via llvm-commits
• [llvm] [LAA]Fix implicit trunc from int64 to int and losing info (PR #139553)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Enable kernel argument preloading (PR #134655)   Tim Gymnich via llvm-commits
• [llvm] [X86][Codegen] add sched for lnlp (PR #139446)   via llvm-commits
• [llvm] [RISCV] Remove`riscv.segN.load/store` in favor of their mask variants (PR #137045)   Harald van Dijk via llvm-commits
• [lld] [LLD][COFF] Add support for including native ARM64 objects in ARM64EC images (PR #137653)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for including native ARM64 objects in ARM64EC images (PR #137653)   Jacek Caban via llvm-commits

Last message date: Mon May 12 07:15:02 PDT 2025
Archived on: Mon May 12 07:15:04 PDT 2025

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