[llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)

[Matt Arsenault via llvm-commits]

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@@ -25,6 +25,24 @@ entry:
   ret void
 }
 
+; GCN-LABEL: {{^}}scalar_andn2_i32_one_sgpr
+; GCN: s_andn2_b32
+define i32 @scalar_andn2_i32_one_sgpr(i32 inreg %a, i32 inreg %b) {
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arsenm wrote:

These tests only show the and not pattern to begin with, it is not showing the transforms enabled by this hook 

https://github.com/llvm/llvm-project/pull/112647