[llvm] [AArch64][SME] Disable hazard padding when there is only PPRs and GPRs (PR #137817)

[Benjamin Maxwell via llvm-commits]

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@@ -3552,11 +3558,12 @@ void AArch64FrameLowering::determineStackHazardSlot(
 
   // Add a hazard slot if there are any CSR FPR registers, or are any fp-only
   // stack objects.
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MacDue wrote:

The correct phrasing would probably be "hazard padding". It's part of the stack allocated to keep the callee-saved GPRs and FPRs at least stack hazard size bytes apart.  

https://github.com/llvm/llvm-project/pull/137817