[llvm] [RISCV] Remove`riscv.segN.load/store` in favor of their mask variants (PR #137045)

[Min-Yih Hsu via llvm-commits]

mshockwave wrote:

> > Personally I'm more inclined to reject non-default address spaces until there is a strong use case of supporting these address spaces. Not only because updating intrinsics and test cases might create a big code churn, as you pointed out, but also due to the fact that new features should be driven by demand rather than the other way around.
> 
> We're actively using this already, that's how I saw this crash in the first place. The use case is translating OpenCL code that uses those address spaces. This works on other architectures (at least X86 and AArch64) and this also used to work on RISC-V.

I think OpenCL's use case is fair. Just curious: my memory might be outdated but I thought the host code (assuming the portion of the code handled by RISC-V backend is the host code) uses the default address space and only memories like `private` or `local` use non-default ones.

https://github.com/llvm/llvm-project/pull/137045