[llvm] b712590 - [X86] Add test coverage for #140234

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2025-05-16T11:30:34+01:00
New Revision: b712590ef4acfd9f0bea42aff695b22ca99ae5dd

URL: https://github.com/llvm/llvm-project/commit/b712590ef4acfd9f0bea42aff695b22ca99ae5dd
DIFF: https://github.com/llvm/llvm-project/commit/b712590ef4acfd9f0bea42aff695b22ca99ae5dd.diff

LOG: [X86] Add test coverage for #140234

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll b/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
index 4cdc65e5c1b97..cf546dc2671f2 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
@@ -857,6 +857,67 @@ define <4 x double> @shuffle_v4f64_2345_0567_select(<4 x double> %vec1, <4 x dou
   ret <4 x double> %res
 }
 
+; PR140234
+define <4 x double> @shuffle_v4f64_1436_split_load(ptr %px, ptr %py) {
+; AVX1-LABEL: shuffle_v4f64_1436_split_load:
+; AVX1:       # %bb.0:
+; AVX1-NEXT:    vmovapd (%rsi), %xmm0
+; AVX1-NEXT:    vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
+; AVX1-NEXT:    vmovupd (%rdi), %ymm1
+; AVX1-NEXT:    vinsertf128 $1, 16(%rsi), %ymm0, %ymm0
+; AVX1-NEXT:    vshufpd {{.*#+}} ymm0 = ymm1[1],ymm0[1],ymm1[3],ymm0[2]
+; AVX1-NEXT:    retq
+;
+; AVX2-LABEL: shuffle_v4f64_1436_split_load:
+; AVX2:       # %bb.0:
+; AVX2-NEXT:    vmovapd (%rsi), %xmm0
+; AVX2-NEXT:    vmovupd (%rdi), %ymm1
+; AVX2-NEXT:    vshufpd {{.*#+}} ymm0 = ymm1[1],ymm0[0],ymm1[3],ymm0[3]
+; AVX2-NEXT:    vbroadcastsd 16(%rsi), %ymm1
+; AVX2-NEXT:    vblendpd {{.*#+}} ymm0 = ymm0[0,1,2],ymm1[3]
+; AVX2-NEXT:    retq
+;
+; AVX512VL-SLOW-LABEL: shuffle_v4f64_1436_split_load:
+; AVX512VL-SLOW:       # %bb.0:
+; AVX512VL-SLOW-NEXT:    vmovapd (%rsi), %xmm0
+; AVX512VL-SLOW-NEXT:    vmovupd (%rdi), %ymm1
+; AVX512VL-SLOW-NEXT:    vshufpd {{.*#+}} ymm0 = ymm1[1],ymm0[0],ymm1[3],ymm0[3]
+; AVX512VL-SLOW-NEXT:    vbroadcastsd 16(%rsi), %ymm1
+; AVX512VL-SLOW-NEXT:    vblendpd {{.*#+}} ymm0 = ymm0[0,1,2],ymm1[3]
+; AVX512VL-SLOW-NEXT:    retq
+;
+; AVX512VL-FAST-ALL-LABEL: shuffle_v4f64_1436_split_load:
+; AVX512VL-FAST-ALL:       # %bb.0:
+; AVX512VL-FAST-ALL-NEXT:    vmovapd (%rsi), %xmm0
+; AVX512VL-FAST-ALL-NEXT:    vmovapd 16(%rsi), %xmm1
+; AVX512VL-FAST-ALL-NEXT:    vmovupd (%rdi), %ymm2
+; AVX512VL-FAST-ALL-NEXT:    vshufpd {{.*#+}} ymm2 = ymm2[1],ymm0[0],ymm2[3],ymm0[3]
+; AVX512VL-FAST-ALL-NEXT:    vpmovsxbq {{.*#+}} ymm0 = [0,1,2,4]
+; AVX512VL-FAST-ALL-NEXT:    vpermi2pd %ymm1, %ymm2, %ymm0
+; AVX512VL-FAST-ALL-NEXT:    retq
+;
+; AVX512VL-FAST-PERLANE-LABEL: shuffle_v4f64_1436_split_load:
+; AVX512VL-FAST-PERLANE:       # %bb.0:
+; AVX512VL-FAST-PERLANE-NEXT:    vmovapd (%rsi), %xmm0
+; AVX512VL-FAST-PERLANE-NEXT:    vmovupd (%rdi), %ymm1
+; AVX512VL-FAST-PERLANE-NEXT:    vshufpd {{.*#+}} ymm0 = ymm1[1],ymm0[0],ymm1[3],ymm0[3]
+; AVX512VL-FAST-PERLANE-NEXT:    vbroadcastsd 16(%rsi), %ymm1
+; AVX512VL-FAST-PERLANE-NEXT:    vblendpd {{.*#+}} ymm0 = ymm0[0,1,2],ymm1[3]
+; AVX512VL-FAST-PERLANE-NEXT:    retq
+  %pxhi = getelementptr inbounds nuw i8, ptr %px, i64 16
+  %pyhi = getelementptr inbounds nuw i8, ptr %py, i64 16
+  %x0 = load <2 x double>, ptr %px, align 16
+  %y0 = load <2 x double>, ptr %py, align 16
+  %x1 = load <2 x double>, ptr %pxhi, align 16
+  %y1 = load <2 x double>, ptr %pyhi, align 16
+  %shuf0 = shufflevector <2 x double> %x0, <2 x double> %y0, <4 x i32> <i32 1, i32 2, i32 poison, i32 poison>
+  %shuf1 = shufflevector <2 x double> %x1, <2 x double> poison, <4 x i32> <i32 poison, i32 1, i32 poison, i32 poison>
+  %shuf2 = shufflevector <4 x double> %shuf0, <4 x double> %shuf1, <4 x i32> <i32 0, i32 1, i32 5, i32 poison>
+  %shuf3 = shufflevector <2 x double> %y1, <2 x double> poison, <4 x i32> <i32 0, i32 poison, i32 poison, i32 poison>
+  %shuf4 = shufflevector <4 x double> %shuf2, <4 x double> %shuf3, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
+  ret <4 x double> %shuf4
+}
+
 define <4 x i64> @shuffle_v4i64_0000(<4 x i64> %a, <4 x i64> %b) {
 ; AVX1-LABEL: shuffle_v4i64_0000:
 ; AVX1:       # %bb.0: