[llvm] [RISCV] Add sext_inreg patterns for XAndesPerf nds.bfos instruction (PR #139714)

[Craig Topper via llvm-commits]

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@@ -404,6 +404,11 @@ def NDS_VFPMADB_VF : NDSRVInstVFPMAD<0b000011, "nds.vfpmadb">;
 
 let Predicates = [HasVendorXAndesPerf] in {
 
+def : Pat<(sext_inreg (XLenVT GPR:$rs1), i32), (NDS_BFOS GPR:$rs1, 31, 0)>;
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topperc wrote:

I've removed the unneeded pattern from RISCVInstrInfoXTHead.td

https://github.com/llvm/llvm-project/pull/139714