[llvm] Added support for extension Arbitrary_precision_floating_point (PR #139680)
via llvm-commits
llvm-commits at lists.llvm.org
Tue May 13 00:27:52 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-spir-v
Author: None (sumesh-s-mcw)
<details>
<summary>Changes</summary>
Added support for the Extension Arbitrary_precision_floating_point
Added test files
---
Patch is 95.41 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/139680.diff
7 Files Affected:
- (modified) llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp (+50)
- (modified) llvm/lib/Target/SPIRV/SPIRVBuiltins.td (+44)
- (modified) llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp (+4-2)
- (modified) llvm/lib/Target/SPIRV/SPIRVInstrInfo.td (+103)
- (modified) llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp (+51-1)
- (modified) llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td (+2)
- (added) llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_arbitrary_precision_floating_point/capability-arbitrary-precision-floating-point.ll (+1237)
``````````diff
diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
index c516be0297e66..f84351b9b811e 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
@@ -2731,6 +2731,54 @@ static bool generateLoadStoreInst(const SPIRV::IncomingCall *Call,
return true;
}
+static bool generateAFPInst(const SPIRV::IncomingCall *Call,
+ MachineIRBuilder &MIRBuilder,
+ SPIRVGlobalRegistry *GR) {
+ const auto *Builtin = Call->Builtin;
+ auto *MRI = MIRBuilder.getMRI();
+ unsigned Opcode =
+ SPIRV::lookupNativeBuiltin(Builtin->Name, Builtin->Set)->Opcode;
+ const Type *RetTy = GR->getTypeForSPIRVType(Call->ReturnType);
+ bool IsVoid = RetTy->isVoidTy();
+ auto MIB = MIRBuilder.buildInstr(Opcode);
+ // Handle return value or destination for void return.
+ Register DestReg;
+ if (IsVoid) {
+ LLT PtrTy = MRI->getType(Call->Arguments[0]);
+ DestReg = MRI->createGenericVirtualRegister(PtrTy);
+ MRI->setRegClass(DestReg, &SPIRV::pIDRegClass);
+
+ SPIRVType *PointeeTy =
+ GR->getPointeeType(GR->getSPIRVTypeForVReg(Call->Arguments[0]));
+ MIB.addDef(DestReg);
+ MIB.addUse(GR->getSPIRVTypeID(PointeeTy));
+ } else {
+ MIB.addDef(Call->ReturnRegister);
+ MIB.addUse(GR->getSPIRVTypeID(Call->ReturnType));
+ }
+ // Add arguments to instruction
+ for (unsigned i = IsVoid ? 1 : 0; i < Call->Arguments.size(); ++i) {
+ Register Arg = Call->Arguments[i];
+ MachineInstr *DefMI = MRI->getUniqueVRegDef(Arg);
+
+ if (DefMI->getOpcode() == TargetOpcode::G_CONSTANT &&
+ DefMI->getOperand(1).isCImm()) {
+ MIB.addImm(getConstFromIntrinsic(Arg, MRI));
+ } else {
+ MIB.addUse(Arg);
+ }
+ }
+ // Store result if return is void
+ if (IsVoid) {
+ LLT PtrTy = MRI->getType(Call->Arguments[0]);
+ MachineMemOperand *MMO = MIRBuilder.getMF().getMachineMemOperand(
+ MachinePointerInfo(), MachineMemOperand::MOStore,
+ PtrTy.getSizeInBytes(), Align(4));
+ MIRBuilder.buildStore(DestReg, Call->Arguments[0], *MMO);
+ }
+ return true;
+}
+
namespace SPIRV {
// Try to find a builtin function attributes by a demangled function name and
// return a tuple <builtin group, op code, ext instruction number>, or a special
@@ -2902,6 +2950,8 @@ std::optional<bool> lowerBuiltin(const StringRef DemangledCall,
return generateBindlessImageINTELInst(Call.get(), MIRBuilder, GR);
case SPIRV::TernaryBitwiseINTEL:
return generateTernaryBitwiseFunctionINTELInst(Call.get(), MIRBuilder, GR);
+ case SPIRV::ArbitraryFloatingPoint:
+ return generateAFPInst(Call.get(), MIRBuilder, GR);
}
return false;
}
diff --git a/llvm/lib/Target/SPIRV/SPIRVBuiltins.td b/llvm/lib/Target/SPIRV/SPIRVBuiltins.td
index 59cd38126cc01..2761115b31bea 100644
--- a/llvm/lib/Target/SPIRV/SPIRVBuiltins.td
+++ b/llvm/lib/Target/SPIRV/SPIRVBuiltins.td
@@ -68,6 +68,7 @@ def ICarryBorrow : BuiltinGroup;
def ExtendedBitOps : BuiltinGroup;
def BindlessINTEL : BuiltinGroup;
def TernaryBitwiseINTEL : BuiltinGroup;
+def ArbitraryFloatingPoint: BuiltinGroup;
//===----------------------------------------------------------------------===//
// Class defining a demangled builtin record. The information in the record
@@ -710,6 +711,49 @@ defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixStoreCheckedINTEL", Open
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixConstructCheckedINTEL", OpenCL_std, CoopMatr, 5, 5, OpCooperativeMatrixConstructCheckedINTEL>;
defm : DemangledNativeBuiltin<"__spirv_CooperativeMatrixGetElementCoordINTEL", OpenCL_std, CoopMatr, 2, 2, OpCooperativeMatrixGetElementCoordINTEL>;
+// Arbitrary Precision Floating Point builtin records:
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatGTINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatGTINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatGEINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatGEINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLTINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatLTINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLEINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatLEINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatEQINTEL", OpenCL_std, ArbitraryFloatingPoint, 4, 4, OpArbitraryFloatEQINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatRecipINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatRecipINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCbrtINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCbrtINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatHypotINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatHypotINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSqrtINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSqrtINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLogINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLogINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog2INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog2INTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog10INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog10INTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatLog1pINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatLog1pINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExpINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExpINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExp2INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExp2INTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExp10INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExp10INTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatExpm1INTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatExpm1INTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCosINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCosINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinCosINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinCosINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinPiINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCosPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCosPiINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSinCosPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatSinCosPiINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatAddINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatAddINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatSubINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatSubINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatMulINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatMulINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatDivINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatDivINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatRSqrtINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatRSqrtINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatASinINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatASinINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatASinPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatASinPiINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatACosINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatACosINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatACosPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatACosPiINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATanINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatATanINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATanPiINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatATanPiINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatATan2INTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatATan2INTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowRINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowRINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatPowNINTEL", OpenCL_std, ArbitraryFloatingPoint, 8, 8, OpArbitraryFloatPowNINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastFromIntINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastFromIntINTEL>;
+defm : DemangledNativeBuiltin<"__spirv_ArbitraryFloatCastToIntINTEL", OpenCL_std, ArbitraryFloatingPoint, 6, 6, OpArbitraryFloatCastToIntINTEL>;
+
// SPV_INTEL_bindless_images builtin records:
defm : DemangledNativeBuiltin<"__spirv_ConvertHandleToImageINTEL", OpenCL_std, BindlessINTEL, 1, 1, OpConvertHandleToImageINTEL>;
defm : DemangledNativeBuiltin<"__spirv_ConvertHandleToSamplerINTEL", OpenCL_std, BindlessINTEL, 1, 1, OpConvertHandleToSamplerINTEL>;
diff --git a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
index 56cbd9414c9ee..1d56bcdfd7471 100644
--- a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
@@ -97,8 +97,10 @@ static const std::map<std::string, SPIRV::Extension::Extension, std::less<>>
SPIRV::Extension::Extension::
SPV_INTEL_subgroup_matrix_multiply_accumulate},
{"SPV_INTEL_ternary_bitwise_function",
- SPIRV::Extension::Extension::SPV_INTEL_ternary_bitwise_function}};
-
+ SPIRV::Extension::Extension::SPV_INTEL_ternary_bitwise_function},
+ {"SPV_INTEL_arbitrary_precision_floating_point",
+ SPIRV::Extension::Extension::SPV_INTEL_arbitrary_precision_floating_point}};
+
bool SPIRVExtensionsParser::parse(cl::Option &O, StringRef ArgName,
StringRef ArgValue,
std::set<SPIRV::Extension::Extension> &Vals) {
diff --git a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
index 6d8c84945d7d4..32b2485044d51 100644
--- a/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
+++ b/llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
@@ -936,3 +936,106 @@ def OpAliasScopeListDeclINTEL: Op<5913, (outs ID:$res), (ins variable_ops),
// SPV_INTEL_ternary_bitwise_function
def OpBitwiseFunctionINTEL: Op<6242, (outs ID:$res), (ins TYPE:$type, ID:$a, ID:$b, ID:$c, ID:$lut_index),
"$res = OpBitwiseFunctionINTEL $type $a $b $c $lut_index">;
+
+// SPV_INTEL_arbitrary_precision_floating_point
+def OpArbitraryFloatGTINTEL: Op<5850, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb),
+ "$res = OpArbitraryFloatGTINTEL $type $A $Ma $B $Mb">;
+def OpArbitraryFloatGEINTEL: Op<5851, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb),
+ "$res = OpArbitraryFloatGEINTEL $type $A $Ma $B $Mb">;
+def OpArbitraryFloatLTINTEL: Op<5852, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb),
+ "$res = OpArbitraryFloatLTINTEL $type $A $Ma $B $Mb">;
+def OpArbitraryFloatLEINTEL: Op<5853, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb),
+ "$res = OpArbitraryFloatLEINTEL $type $A $Ma $B $Mb">;
+def OpArbitraryFloatEQINTEL: Op<5854, (outs ID:$res), (ins TYPE:$type, ID:$A, i32imm:$Ma , ID:$B, i32imm:$Mb),
+ "$res = OpArbitraryFloatEQINTEL $type $A $Ma $B $Mb">;
+def OpArbitraryFloatRecipINTEL: Op<5855, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatRecipINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatCbrtINTEL: Op<5857, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatCbrtINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatHypotINTEL: Op<5858, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, ID:$B, i32imm:$Mb, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatHypotINTEL $type $A $Ma $B $Mb $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatSqrtINTEL: Op<5859, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatSqrtINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatLogINTEL: Op<5860, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatLogINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatLog2INTEL: Op<5861, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatLog2INTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatLog10INTEL: Op<5862, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatLog10INTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatLog1pINTEL: Op<5863, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatLog1pINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatExpINTEL: Op<5864, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatExpINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatExp2INTEL: Op<5865, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatExp2INTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatExp10INTEL: Op<5866, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatExp10INTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatExpm1INTEL: Op<5867, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatExpm1INTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatSinINTEL: Op<5868, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatSinINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatCosINTEL: Op<5869, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatCosINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatSinCosINTEL: Op<5870, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatSinCosINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatSinPiINTEL: Op<5871, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatSinPiINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatCosPiINTEL: Op<5872, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatCosPiINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatSinCosPiINTEL: Op<5840, (outs ID:$res),
+ (ins TYPE:$type, ID:$A, i32imm:$Ma, i32imm:$Mresult, i32imm:$subnormalMode, i32imm:$RoundingMode, i32imm:$RoundingAccuracy),
+ "$res = OpArbitraryFloatSinCosPiINTEL $type $A $Ma $Mresult $subnormalMode $RoundingMode $RoundingAccuracy">;
+def OpArbitraryFloatAddINTEL: Op<5846, (outs ID:$res),
+ (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode),
+ "$res = OpArbitraryFloatAddINTEL $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">;
+def OpArbitraryFloatSubINTEL: Op<5847, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode),
+ "$res = OpArbitraryFloatSubINTEL $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">;
+def OpArbitraryFloatMulINTEL: Op<5848, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode),
+ "$res = OpArbitraryFloatMulINTEL $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">;
+def OpArbitraryFloatDivINTEL: Op<5849, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, ID:$src2, i32imm:$src2_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode),
+ "$res = OpArbitraryFloatDivINTEL $type $src $src_mwidth $src2 $src2_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">;
+def OpArbitraryFloatRSqrtINTEL: Op<5856, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode),
+ "$res = OpArbitraryFloatRSqrtINTEL $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">;
+def OpArbitraryFloatASinINTEL: Op<5873, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i32imm:$fproundingmode, i32imm:$roundaccuracymode),
+ "$res = OpArbitraryFloatASinINTEL $type $src $src_mwidth $res_mwidth $subnorm $fproundingmode $roundaccuracymode">;
+def OpArbitraryFloatASinPiINTEL: Op<5874, (outs ID:$res), (ins TYPE:$type, ID:$src, i32imm:$src_mwidth, i32imm:$res_mwidth, i32imm:$subnorm, i...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/139680
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