[llvm] [RISCV] Remove`riscv.segN.load/store` in favor of their mask variants (PR #137045)
Harald van Dijk via llvm-commits
llvm-commits at lists.llvm.org
Mon May 12 09:35:21 PDT 2025
hvdijk wrote:
> Personally I'm more inclined to reject non-default address spaces until there is a strong use case of supporting these address spaces. Not only because updating intrinsics and test cases might create a big code churn, as you pointed out, but also due to the fact that new features should be driven by demand rather than the other way around.
We're actively using this already, that's how I saw this crash in the first place. The use case is translating OpenCL code that uses those address spaces. This works on other architectures (at least X86 and AArch64) and this also used to work on RISC-V.
https://github.com/llvm/llvm-project/pull/137045
More information about the llvm-commits
mailing list