[llvm] [NVPTX] Vectorize and lower 256-bit global loads/stores for sm_100+/ptx88+ (PR #139292)

[Drew Kersnar via llvm-commits]

================
@@ -1244,16 +1237,9 @@ bool NVPTXDAGToDAGISel::tryLoadVector(SDNode *N) {
                         NVPTX::LDV_f32_v4, NVPTX::LDV_f64_v4);
     break;
   case NVPTXISD::LoadV8:
-    switch (EltVT.getSimpleVT().SimpleTy) {
-    case MVT::i32:
-      Opcode = NVPTX::LDV_i32_v8;
-      break;
-    case MVT::f32:
-      Opcode = NVPTX::LDV_f32_v8;
-      break;
-    default:
-      return false;
-    }
+    Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, std::nullopt,
+                             std::nullopt, NVPTX::LDV_i32_v8, std::nullopt,
+                             NVPTX::LDV_f32_v8, std::nullopt);
----------------
dakersnar wrote:

Good idea, done. I changed other calls in the file too while I was at it.

https://github.com/llvm/llvm-project/pull/139292