[llvm] [RISCV] Add isel patterns for generating Xqcibi branch instructions (PR #139872)

[Craig Topper via llvm-commits]

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@@ -2408,6 +2417,15 @@ static void translateSetCCForBranch(const SDLoc &DL, SDValue &LHS, SDValue &RHS,
         return;
       }
       break;
+    case ISD::SETUGT:
+      if (Subtarget.hasVendorXqcibi() && isInt<16>(C + 1) && C != -1) {
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topperc wrote:

Need to check `C != INT64_MAX`

https://github.com/llvm/llvm-project/pull/139872