[llvm] 3def997 - Use early return/continue in TailDuplicator::duplicateInstruction [nfc]

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Fri May 16 13:33:35 PDT 2025


Author: Philip Reames
Date: 2025-05-16T13:33:11-07:00
New Revision: 3def9976ebeb1dec7fb867a927f3e2e4adf1816b

URL: https://github.com/llvm/llvm-project/commit/3def9976ebeb1dec7fb867a927f3e2e4adf1816b
DIFF: https://github.com/llvm/llvm-project/commit/3def9976ebeb1dec7fb867a927f3e2e4adf1816b.diff

LOG: Use early return/continue in TailDuplicator::duplicateInstruction [nfc]

Added: 
    

Modified: 
    llvm/lib/CodeGen/TailDuplicator.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/TailDuplicator.cpp b/llvm/lib/CodeGen/TailDuplicator.cpp
index b69b8227b1674..a88c57fdc165a 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -399,81 +399,81 @@ void TailDuplicator::duplicateInstruction(
     return;
   }
   MachineInstr &NewMI = TII->duplicate(*PredBB, PredBB->end(), *MI);
-  if (PreRegAlloc) {
-    for (unsigned i = 0, e = NewMI.getNumOperands(); i != e; ++i) {
-      MachineOperand &MO = NewMI.getOperand(i);
-      if (!MO.isReg())
-        continue;
-      Register Reg = MO.getReg();
-      if (!Reg.isVirtual())
-        continue;
-      if (MO.isDef()) {
-        const TargetRegisterClass *RC = MRI->getRegClass(Reg);
-        Register NewReg = MRI->createVirtualRegister(RC);
-        MO.setReg(NewReg);
-        LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0)));
-        if (isDefLiveOut(Reg, TailBB, MRI) || UsedByPhi.count(Reg))
-          addSSAUpdateEntry(Reg, NewReg, PredBB);
-      } else {
-        auto VI = LocalVRMap.find(Reg);
-        if (VI != LocalVRMap.end()) {
-          // Need to make sure that the register class of the mapped register
-          // will satisfy the constraints of the class of the register being
-          // replaced.
-          auto *OrigRC = MRI->getRegClass(Reg);
-          auto *MappedRC = MRI->getRegClass(VI->second.Reg);
-          const TargetRegisterClass *ConstrRC;
-          if (VI->second.SubReg != 0) {
-            ConstrRC = TRI->getMatchingSuperRegClass(MappedRC, OrigRC,
-                                                     VI->second.SubReg);
-            if (ConstrRC) {
-              // The actual constraining (as in "find appropriate new class")
-              // is done by getMatchingSuperRegClass, so now we only need to
-              // change the class of the mapped register.
-              MRI->setRegClass(VI->second.Reg, ConstrRC);
-            }
-          } else {
-            // For mapped registers that do not have sub-registers, simply
-            // restrict their class to match the original one.
-
-            // We don't want debug instructions affecting the resulting code so
-            // if we're cloning a debug instruction then just use MappedRC
-            // rather than constraining the register class further.
-            ConstrRC = NewMI.isDebugInstr()
-                           ? MappedRC
-                           : MRI->constrainRegClass(VI->second.Reg, OrigRC);
-          }
-
-          if (ConstrRC) {
-            // If the class constraining succeeded, we can simply replace
-            // the old register with the mapped one.
-            MO.setReg(VI->second.Reg);
-            // We have Reg -> VI.Reg:VI.SubReg, so if Reg is used with a
-            // sub-register, we need to compose the sub-register indices.
-            MO.setSubReg(
-                TRI->composeSubRegIndices(VI->second.SubReg, MO.getSubReg()));
-          } else {
-            // The direct replacement is not possible, due to failing register
-            // class constraints. An explicit COPY is necessary. Create one
-            // that can be reused.
-            Register NewReg = MRI->createVirtualRegister(OrigRC);
-            BuildMI(*PredBB, NewMI, NewMI.getDebugLoc(),
-                    TII->get(TargetOpcode::COPY), NewReg)
-                .addReg(VI->second.Reg, 0, VI->second.SubReg);
-            LocalVRMap.erase(VI);
-            LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0)));
-            MO.setReg(NewReg);
-            // The composed VI.Reg:VI.SubReg is replaced with NewReg, which
-            // is equivalent to the whole register Reg. Hence, Reg:subreg
-            // is same as NewReg:subreg, so keep the sub-register index
-            // unchanged.
-          }
-          // Clear any kill flags from this operand.  The new register could
-          // have uses after this one, so kills are not valid here.
-          MO.setIsKill(false);
-        }
+  if (!PreRegAlloc)
+    return;
+  for (unsigned i = 0, e = NewMI.getNumOperands(); i != e; ++i) {
+    MachineOperand &MO = NewMI.getOperand(i);
+    if (!MO.isReg())
+      continue;
+    Register Reg = MO.getReg();
+    if (!Reg.isVirtual())
+      continue;
+    if (MO.isDef()) {
+      const TargetRegisterClass *RC = MRI->getRegClass(Reg);
+      Register NewReg = MRI->createVirtualRegister(RC);
+      MO.setReg(NewReg);
+      LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0)));
+      if (isDefLiveOut(Reg, TailBB, MRI) || UsedByPhi.count(Reg))
+        addSSAUpdateEntry(Reg, NewReg, PredBB);
+      continue;
+    }
+    auto VI = LocalVRMap.find(Reg);
+    if (VI == LocalVRMap.end())
+      continue;
+    // Need to make sure that the register class of the mapped register
+    // will satisfy the constraints of the class of the register being
+    // replaced.
+    auto *OrigRC = MRI->getRegClass(Reg);
+    auto *MappedRC = MRI->getRegClass(VI->second.Reg);
+    const TargetRegisterClass *ConstrRC;
+    if (VI->second.SubReg != 0) {
+      ConstrRC =
+          TRI->getMatchingSuperRegClass(MappedRC, OrigRC, VI->second.SubReg);
+      if (ConstrRC) {
+        // The actual constraining (as in "find appropriate new class")
+        // is done by getMatchingSuperRegClass, so now we only need to
+        // change the class of the mapped register.
+        MRI->setRegClass(VI->second.Reg, ConstrRC);
       }
+    } else {
+      // For mapped registers that do not have sub-registers, simply
+      // restrict their class to match the original one.
+
+      // We don't want debug instructions affecting the resulting code so
+      // if we're cloning a debug instruction then just use MappedRC
+      // rather than constraining the register class further.
+      ConstrRC = NewMI.isDebugInstr()
+                     ? MappedRC
+                     : MRI->constrainRegClass(VI->second.Reg, OrigRC);
+    }
+
+    if (ConstrRC) {
+      // If the class constraining succeeded, we can simply replace
+      // the old register with the mapped one.
+      MO.setReg(VI->second.Reg);
+      // We have Reg -> VI.Reg:VI.SubReg, so if Reg is used with a
+      // sub-register, we need to compose the sub-register indices.
+      MO.setSubReg(
+          TRI->composeSubRegIndices(VI->second.SubReg, MO.getSubReg()));
+    } else {
+      // The direct replacement is not possible, due to failing register
+      // class constraints. An explicit COPY is necessary. Create one
+      // that can be reused.
+      Register NewReg = MRI->createVirtualRegister(OrigRC);
+      BuildMI(*PredBB, NewMI, NewMI.getDebugLoc(), TII->get(TargetOpcode::COPY),
+              NewReg)
+          .addReg(VI->second.Reg, 0, VI->second.SubReg);
+      LocalVRMap.erase(VI);
+      LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0)));
+      MO.setReg(NewReg);
+      // The composed VI.Reg:VI.SubReg is replaced with NewReg, which
+      // is equivalent to the whole register Reg. Hence, Reg:subreg
+      // is same as NewReg:subreg, so keep the sub-register index
+      // unchanged.
     }
+    // Clear any kill flags from this operand.  The new register could
+    // have uses after this one, so kills are not valid here.
+    MO.setIsKill(false);
   }
 }
 


        


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