[llvm] [LLVM][AArch64] Correctly lower funnel shifts by zero. (PR #140058)

[David Green via llvm-commits]

davemgreen wrote:

This is #139866. The sequence of events is there is i128 shl by load -> i64 shl_parts by load -> i64 shl_parts by 0 (the load is optimized to a 0, via rauw I would guess) -> (there is no combine for shl_part by 0 but does get visited) -> lowered to i64 fshl by 0 via custom/expandShiftParts -> lower fshl that goes wrong.

https://github.com/llvm/llvm-project/pull/140058