[llvm] [AMDGPU] Canonicalize G_ZEXT of the shift amount in RegBankCombiner (PR #131792)

[Matt Arsenault via llvm-commits]

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@@ -134,6 +134,22 @@ def combine_fmul_with_select_to_fldexp : GICombineRule<
           [{ return Helper.matchCombineFmulWithSelectToFldexp(*${root}, *${sel}, ${matchinfo}); }]),
   (apply  [{ Helper.applyBuildFn(*${root}, ${matchinfo}); }])>;
 
+// (shift x, (zext amt)) -> (shift x, (and (anyext amt), mask)
+//
+// The pattern is longer, but is better for matching during ISel.
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arsenm wrote:

At worst you should only need to add more explicit types to the patterns. The shift amount has a general register that supports many types 

https://github.com/llvm/llvm-project/pull/131792