[llvm] b96c5df - [Mips] Add support of MipsInstrInfo::getNop() (#139863)

[via llvm-commits]

Author: yingopq
Date: 2025-05-14T19:52:31+08:00
New Revision: b96c5df04e55396572a7c12cb6505f5a116072cb

URL: https://github.com/llvm/llvm-project/commit/b96c5df04e55396572a7c12cb6505f5a116072cb
DIFF: https://github.com/llvm/llvm-project/commit/b96c5df04e55396572a7c12cb6505f5a116072cb.diff

LOG: [Mips] Add support of MipsInstrInfo::getNop() (#139863)

Fix compile crash when using __builtin_unreachable. 
Fix #134913.

Added: 
    llvm/test/CodeGen/Mips/unreachable.ll

Modified: 
    llvm/lib/Target/Mips/MipsInstrInfo.cpp
    llvm/lib/Target/Mips/MipsInstrInfo.h

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index b81bb1186de72..8a59532ba5786 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -26,6 +26,7 @@
 #include "llvm/CodeGen/TargetSubtargetInfo.h"
 #include "llvm/IR/DebugInfoMetadata.h"
 #include "llvm/IR/DebugLoc.h"
+#include "llvm/MC/MCInstBuilder.h"
 #include "llvm/MC/MCInstrDesc.h"
 #include "llvm/Target/TargetMachine.h"
 #include <cassert>
@@ -53,6 +54,13 @@ bool MipsInstrInfo::isZeroImm(const MachineOperand &op) const {
   return op.isImm() && op.getImm() == 0;
 }
 
+MCInst MipsInstrInfo::getNop() const {
+  return MCInstBuilder(Mips::SLL)
+      .addReg(Mips::ZERO)
+      .addReg(Mips::ZERO)
+      .addImm(0);
+}
+
 /// insertNoop - If data hazard condition is found insert the target nop
 /// instruction.
 void MipsInstrInfo::

diff  --git a/llvm/lib/Target/Mips/MipsInstrInfo.h b/llvm/lib/Target/Mips/MipsInstrInfo.h
index 06964c0161b4b..2337ae7c079e7 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.h
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.h
@@ -57,6 +57,8 @@ class MipsInstrInfo : public MipsGenInstrInfo {
 
   explicit MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBrOpc);
 
+  MCInst getNop() const override;
+
   static const MipsInstrInfo *create(MipsSubtarget &STI);
 
   /// Branch Analysis

diff  --git a/llvm/test/CodeGen/Mips/unreachable.ll b/llvm/test/CodeGen/Mips/unreachable.ll
new file mode 100644
index 0000000000000..30087411f7b89
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/unreachable.ll
@@ -0,0 +1,13 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=mipsel-windows-gnu < %s | FileCheck %s -check-prefix=MIPSEL
+
+define void @unreachable() {
+; MIPSEL-LABEL: unreachable:
+; MIPSEL:       # %bb.0: # %entry
+; MIPSEL-NEXT:    .insn
+; MIPSEL-NEXT:    nop
+
+entry:
+  unreachable
+}
+