[llvm] [PowerPC] Add load/store support for v2048i1 and DMF cryptography instructions (PR #136145)

[Lei Huang via llvm-commits]

================
@@ -11824,10 +11831,40 @@ SDValue PPCTargetLowering::LowerDMFVectorLoad(SDValue Op,
   SDValue HiSub = DAG.getTargetConstant(PPC::sub_wacc_hi, dl, MVT::i32);
   SDValue RC = DAG.getTargetConstant(PPC::DMRRCRegClassID, dl, MVT::i32);
   const SDValue Ops[] = {RC, Lo, LoSub, Hi, HiSub};
+
   SDValue Value =
       SDValue(DAG.getMachineNode(PPC::REG_SEQUENCE, dl, MVT::v1024i1, Ops), 0);
 
-  SDValue RetOps[] = {Value, TF};
+  SDValue DmrPValue;
----------------
lei137 wrote:

Maybe we can do do early exit here:
```suggestion
  if (IsV1024i1) {
    SDValue RetOps[] = {Value, TF};
    return DAG.getMergeValues(RetOps, dl);
  }
  
  // Handle Loads for V2048i1.
  SDValue DmrPValue;
```

https://github.com/llvm/llvm-project/pull/136145