[llvm] [RISCV] Use RISCVRegisterInfo::isRVVRegClass to replace IsScalableVector in storeRegToStackSlot/loadRegFromStackSlot. NFC (PR #139979)
Sam Elliott via llvm-commits
llvm-commits at lists.llvm.org
Wed May 14 17:06:50 PDT 2025
https://github.com/lenary approved this pull request.
https://github.com/llvm/llvm-project/pull/139979
More information about the llvm-commits
mailing list