[llvm] [SelectionDAG][AArch64] Add dot product lowering in NEON for PARTIAL_REDUCE_*MLA ISD nodes (PR #140075)
Sam Tebbs via llvm-commits
llvm-commits at lists.llvm.org
Thu May 15 08:53:53 PDT 2025
================
@@ -174,10 +175,17 @@ define <4 x i32> @usdot(<4 x i32> %acc, <16 x i8> %u, <16 x i8> %s) {
; CHECK-NOI8MM-NEXT: smlal2 v0.4s, v2.8h, v1.8h
; CHECK-NOI8MM-NEXT: ret
;
-; CHECK-I8MM-LABEL: usdot:
-; CHECK-I8MM: // %bb.0:
-; CHECK-I8MM-NEXT: usdot v0.4s, v1.16b, v2.16b
-; CHECK-I8MM-NEXT: ret
+; CHECK-NEWLOWERING-I8MM-LABEL: usdot:
----------------
SamTebbs33 wrote:
Can we keep the I8MM check statements and add these NEWLOWERING ones as new ones?
https://github.com/llvm/llvm-project/pull/140075
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