[llvm] 2b5222b - [X86] SimplifyDemandedVectorEltsForTargetNode - add X86ISD::MOVDDUP handling (#140237)

[via llvm-commits]

Author: Simon Pilgrim
Date: 2025-05-16T14:45:38+01:00
New Revision: 2b5222b1927fbe89d9d6a72a63f5dca2d457565f

URL: https://github.com/llvm/llvm-project/commit/2b5222b1927fbe89d9d6a72a63f5dca2d457565f
DIFF: https://github.com/llvm/llvm-project/commit/2b5222b1927fbe89d9d6a72a63f5dca2d457565f.diff

LOG: [X86] SimplifyDemandedVectorEltsForTargetNode - add X86ISD::MOVDDUP handling (#140237)

Reduce YMM MOVDDUP node to XMM if the upper elements are not demanded

Noticed while working on #140234

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index cc45067fbf300..70d44ad96cd64 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -44013,6 +44013,8 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
     case X86ISD::VZEXT_MOVL:
       // Variable blend.
     case X86ISD::BLENDV:
+      // Target unary shuffles:
+    case X86ISD::MOVDDUP:
       // Target unary shuffles by immediate:
     case X86ISD::PSHUFD:
     case X86ISD::PSHUFLW:

diff  --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll b/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
index cf546dc2671f2..d848a8b879215 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
@@ -861,8 +861,7 @@ define <4 x double> @shuffle_v4f64_2345_0567_select(<4 x double> %vec1, <4 x dou
 define <4 x double> @shuffle_v4f64_1436_split_load(ptr %px, ptr %py) {
 ; AVX1-LABEL: shuffle_v4f64_1436_split_load:
 ; AVX1:       # %bb.0:
-; AVX1-NEXT:    vmovapd (%rsi), %xmm0
-; AVX1-NEXT:    vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
+; AVX1-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
 ; AVX1-NEXT:    vmovupd (%rdi), %ymm1
 ; AVX1-NEXT:    vinsertf128 $1, 16(%rsi), %ymm0, %ymm0
 ; AVX1-NEXT:    vshufpd {{.*#+}} ymm0 = ymm1[1],ymm0[1],ymm1[3],ymm0[2]