[llvm] d27d0c7 - [X86] atomic-load-store.ll - add SSE/AVX level coverage for future vector atomic memory operations
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon May 12 02:35:28 PDT 2025
Author: Simon Pilgrim
Date: 2025-05-12T10:35:12+01:00
New Revision: d27d0c7a5266f89f9d62464e71be98421aae598d
URL: https://github.com/llvm/llvm-project/commit/d27d0c7a5266f89f9d62464e71be98421aae598d
DIFF: https://github.com/llvm/llvm-project/commit/d27d0c7a5266f89f9d62464e71be98421aae598d.diff
LOG: [X86] atomic-load-store.ll - add SSE/AVX level coverage for future vector atomic memory operations
Help #138635 where we need to ensure correct SSE/AVX load instructions
Added:
Modified:
llvm/test/CodeGen/X86/atomic-load-store.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/atomic-load-store.ll b/llvm/test/CodeGen/X86/atomic-load-store.ll
index 5bce4401f7bdb..45277ce3d26c4 100644
--- a/llvm/test/CodeGen/X86/atomic-load-store.ll
+++ b/llvm/test/CodeGen/X86/atomic-load-store.ll
@@ -1,10 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.7.0 -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.7.0 -verify-machineinstrs -O0 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,CHECK-O3
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,CHECK-O3
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-O3
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-O3
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,CHECK-O0
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,CHECK-O0
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-O0
+; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-O0
define void @test1(ptr %ptr, i32 %val1) {
; CHECK-LABEL: test1:
-; CHECK: ## %bb.0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xchgl %esi, (%rdi)
; CHECK-NEXT: retq
store atomic i32 %val1, ptr %ptr seq_cst, align 4
@@ -13,7 +19,7 @@ define void @test1(ptr %ptr, i32 %val1) {
define void @test2(ptr %ptr, i32 %val1) {
; CHECK-LABEL: test2:
-; CHECK: ## %bb.0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, (%rdi)
; CHECK-NEXT: retq
store atomic i32 %val1, ptr %ptr release, align 4
@@ -22,9 +28,12 @@ define void @test2(ptr %ptr, i32 %val1) {
define i32 @test3(ptr %ptr) {
; CHECK-LABEL: test3:
-; CHECK: ## %bb.0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl (%rdi), %eax
; CHECK-NEXT: retq
%val = load atomic i32, ptr %ptr seq_cst, align 4
ret i32 %val
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-O0: {{.*}}
+; CHECK-O3: {{.*}}
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