[llvm] [AArch64] Stop reserved registers from being saved in prolog/epilog (PR #138448)

[Mikael Holmén via llvm-commits]

mikaelholmen wrote:

Hi @yasuna-oribe 

With this patch, the reserveXreg.ll restcase fails if we run verifiers, e.g. if adding -verify-machineinstrs to the run line (or if you compiled llc with EXPENSIVE_CHECKS).
It then fails like
```
# After Register Coalescer
********** INTERVALS **********
W1 [16r,16d:1)[64r,64d:0) 0 at 64r 1 at 16r
W1_HI [16r,16d:1)[64r,64d:0) 0 at 64r 1 at 16r
RegMasks:
********** MACHINEINSTRS **********
# Machine code for function t1: NoPHIs, TracksLiveness, TiedOpsRewritten

0B	bb.0 (%ir-block.0):
16B	  $w1 = MOVi32imm 256
64B	  INLINEASM &"" [sideeffect] [attdialect], $0:[regdef], implicit-def $x1, $1:[reguse], $x1
80B	  RET_ReallyLR

# End machine code for function t1.

*** Bad machine code: Defining instruction does not modify register ***
- function:    t1
- basic block: %bb.0  (0x55d733a4b4b0) [0B;96B)
- instruction: 16B	$w1 = MOVi32imm 256
- liverange:   [16r,16d:1)[64r,64d:0) 0 at 64r 1 at 16r
- regunit:     W1_HI
- ValNo:       1 (def 16r)
LLVM ERROR: Found 1 machine code errors.
```


https://github.com/llvm/llvm-project/pull/138448