[llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)

[Owen Anderson via llvm-commits]

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@@ -2388,7 +2391,7 @@ static bool canFoldInAddressingMode(SDNode *N, SDNode *Use, SelectionDAG &DAG,
   }
 
   TargetLowering::AddrMode AM;
-  if (N->getOpcode() == ISD::ADD) {
+  if (N->getOpcode() == ISD::ADD || N->getOpcode() == ISD::PTRADD) {
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resistor wrote:

This line isn't present in the `cheriot` downstream, at least: https://github.com/CHERIoT-Platform/llvm-project/blob/ba63f5a2d112f961b921f19656da7ac61fa1fd1c/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L2419

Perhaps it came from a change we're missing, but it's not obviously required to me, so I'd be interested to know where it came from. That said, it wouldn't break us since we don't have addressing modes anyways.

https://github.com/llvm/llvm-project/pull/140017