[llvm] [RISCV] Use RISCVRegisterInfo::isRVVRegClass to replace IsScalableVector in storeRegToStackSlot/loadRegFromStackSlot. NFC (PR #139979)

Pengcheng Wang via llvm-commits llvm-commits at lists.llvm.org
Wed May 14 21:23:05 PDT 2025

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https://github.com/wangpc-pp approved this pull request.


https://github.com/llvm/llvm-project/pull/139979

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