[llvm] 310ed2b - [LoopUnroll] Add tests with multiple exiting/latches and small BTCs.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Thu May 15 04:54:46 PDT 2025
Author: Florian Hahn
Date: 2025-05-15T12:54:00+01:00
New Revision: 310ed2b070432db3899473c4c2fd92f6a5e35067
URL: https://github.com/llvm/llvm-project/commit/310ed2b070432db3899473c4c2fd92f6a5e35067
DIFF: https://github.com/llvm/llvm-project/commit/310ed2b070432db3899473c4c2fd92f6a5e35067.diff
LOG: [LoopUnroll] Add tests with multiple exiting/latches and small BTCs.
Extra test coverage for cases mentioned during review of
https://github.com/llvm/llvm-project/pull/139551.
Added:
Modified:
llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll b/llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
index e04786e50e96c..2d024bd83e5ce 100644
--- a/llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
+++ b/llvm/test/Transforms/LoopUnroll/peel-last-iteration.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
-; RUN: opt -p loop-unroll -S %s | FileCheck %s
+; RUN: opt -p loop-unroll -unroll-full-max-count=0 -S %s | FileCheck %s
define i64 @peel_single_block_loop_iv_step_1() {
; CHECK-LABEL: define i64 @peel_single_block_loop_iv_step_1() {
@@ -68,16 +68,14 @@ exit:
ret i64 %iv
}
-
-
define i64 @peel_single_block_loop_iv_step_1_eq_pred() {
; CHECK-LABEL: define i64 @peel_single_block_loop_iv_step_1_eq_pred() {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
-; CHECK-NEXT: [[CMP18_NOT:%.*]] = icmp eq i64 [[IV]], 63
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP18_NOT]], i32 10, i32 20
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV]], 63
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 10, i32 20
; CHECK-NEXT: call void @foo(i32 [[COND]])
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 64
@@ -136,22 +134,28 @@ exit:
define i64 @peel_single_block_loop_iv_step_1_nested_loop() {
; CHECK-LABEL: define i64 @peel_single_block_loop_iv_step_1_nested_loop() {
-; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: br label %[[OUTER_HEADER:.*]]
; CHECK: [[OUTER_HEADER]]:
+; CHECK-NEXT: [[OUTER_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[OUTER_IV_NEXT:%.*]], %[[OUTER_LATCH:.*]] ]
; CHECK-NEXT: br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
-; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi i64 [ 0, %[[OUTER_HEADER]] ], [ [[IV_NEXT_PEEL:%.*]], %[[LOOP]] ]
-; CHECK-NEXT: [[CMP18_NOT_PEEL:%.*]] = icmp eq i64 [[IV_NEXT_LCSSA]], 63
-; CHECK-NEXT: [[COND_PEEL:%.*]] = select i1 [[CMP18_NOT_PEEL]], i32 10, i32 20
-; CHECK-NEXT: call void @foo(i32 [[COND_PEEL]])
-; CHECK-NEXT: [[IV_NEXT_PEEL]] = add i64 [[IV_NEXT_LCSSA]], 1
-; CHECK-NEXT: [[EC_PEEL:%.*]] = icmp ne i64 [[IV_NEXT_PEEL]], 64
-; CHECK-NEXT: br i1 [[EC_PEEL]], label %[[LOOP]], label %[[OUTER_LATCH:.*]]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[OUTER_HEADER]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV]], 63
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 10, i32 20
+; CHECK-NEXT: call void @foo(i32 [[COND]])
+; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp ne i64 [[IV_NEXT]], 64
+; CHECK-NEXT: br i1 [[EC]], label %[[LOOP]], label %[[OUTER_LATCH]]
; CHECK: [[OUTER_LATCH]]:
-; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV_NEXT_LCSSA]], %[[LOOP]] ]
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], %[[LOOP]] ]
; CHECK-NEXT: call void @foo(i32 1)
-; CHECK-NEXT: ret i64 [[IV_LCSSA]]
+; CHECK-NEXT: [[OUTER_IV_NEXT]] = add i64 [[OUTER_IV]], 1
+; CHECK-NEXT: [[OUTER_EC:%.*]] = icmp ne i64 [[OUTER_IV_NEXT]], 100
+; CHECK-NEXT: br i1 [[OUTER_EC]], label %[[EXIT:.*]], label %[[OUTER_HEADER]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[IV_LCSSA_LCSSA:%.*]] = phi i64 [ [[IV_LCSSA]], %[[OUTER_LATCH]] ]
+; CHECK-NEXT: ret i64 [[IV_LCSSA_LCSSA]]
;
entry:
br label %outer.header
@@ -184,21 +188,21 @@ define i64 @peel_multi_block_loop_iv_step_1() {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: br label %[[LOOP:.*]]
; CHECK: [[LOOP]]:
-; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT_PEEL:%.*]], %[[LATCH:.*]] ]
-; CHECK-NEXT: [[CMP18_NOT_PEEL:%.*]] = icmp eq i64 [[IV_NEXT_LCSSA]], 63
-; CHECK-NEXT: [[COND_PEEL:%.*]] = select i1 [[CMP18_NOT_PEEL]], i32 10, i32 20
-; CHECK-NEXT: call void @foo(i32 [[COND_PEEL]])
-; CHECK-NEXT: [[C_PEEL:%.*]] = call i1 @cond()
-; CHECK-NEXT: br i1 [[C_PEEL]], label %[[THEN:.*]], label %[[LATCH]]
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LATCH:.*]] ]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV]], 63
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 10, i32 20
+; CHECK-NEXT: call void @foo(i32 [[COND]])
+; CHECK-NEXT: [[C:%.*]] = call i1 @cond()
+; CHECK-NEXT: br i1 [[C]], label %[[THEN:.*]], label %[[LATCH]]
; CHECK: [[THEN]]:
-; CHECK-NEXT: call void @foo(i32 [[COND_PEEL]])
+; CHECK-NEXT: call void @foo(i32 [[COND]])
; CHECK-NEXT: br label %[[LATCH]]
; CHECK: [[LATCH]]:
-; CHECK-NEXT: [[IV_NEXT_PEEL]] = add i64 [[IV_NEXT_LCSSA]], 1
-; CHECK-NEXT: [[EC_PEEL:%.*]] = icmp ne i64 [[IV_NEXT_PEEL]], 64
-; CHECK-NEXT: br i1 [[EC_PEEL]], label %[[LOOP]], label %[[EXIT:.*]]
+; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp ne i64 [[IV_NEXT]], 64
+; CHECK-NEXT: br i1 [[EC]], label %[[LOOP]], label %[[EXIT:.*]]
; CHECK: [[EXIT]]:
-; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV_NEXT_LCSSA]], %[[LATCH]] ]
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], %[[LATCH]] ]
; CHECK-NEXT: ret i64 [[IV_LCSSA]]
;
entry:
@@ -264,6 +268,69 @@ exit:
ret i64 %iv
}
+define i64 @peel_single_block_loop_iv_step_1_btc_0() {
+; CHECK-LABEL: define i64 @peel_single_block_loop_iv_step_1_btc_0() {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV]], 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 10, i32 20
+; CHECK-NEXT: call void @foo(i32 [[COND]])
+; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp ne i64 [[IV_NEXT]], 1
+; CHECK-NEXT: br i1 [[EC]], label %[[LOOP]], label %[[EXIT:.*]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], %[[LOOP]] ]
+; CHECK-NEXT: ret i64 [[IV_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %cmp = icmp eq i64 %iv, 0
+ %cond = select i1 %cmp, i32 10, i32 20
+ call void @foo(i32 %cond)
+ %iv.next = add i64 %iv, 1
+ %ec = icmp ne i64 %iv.next, 1
+ br i1 %ec, label %loop, label %exit
+
+exit:
+ ret i64 %iv
+}
+
+define i64 @peel_single_block_loop_iv_step_1_btc_1() {
+; CHECK-LABEL: define i64 @peel_single_block_loop_iv_step_1_btc_1() {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV]], 1
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 10, i32 20
+; CHECK-NEXT: call void @foo(i32 [[COND]])
+; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT: [[EC:%.*]] = icmp ne i64 [[IV_NEXT]], 2
+; CHECK-NEXT: br i1 [[EC]], label %[[LOOP]], label %[[EXIT:.*]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], %[[LOOP]] ]
+; CHECK-NEXT: ret i64 [[IV_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %cmp = icmp eq i64 %iv, 1
+ %cond = select i1 %cmp, i32 10, i32 20
+ call void @foo(i32 %cond)
+ %iv.next = add i64 %iv, 1
+ %ec = icmp ne i64 %iv.next, 2
+ br i1 %ec, label %loop, label %exit
+
+exit:
+ ret i64 %iv
+}
define i64 @peel_single_block_loop_iv_step_1_may_execute_only_once(i64 %n) {
; CHECK-LABEL: define i64 @peel_single_block_loop_iv_step_1_may_execute_only_once(
@@ -427,5 +494,62 @@ exit:
ret i32 %sum.0.lcssa
}
+define i64 @peel_multi_exit_multi_latch_loop_iv_step_1(i64 %N) {
+; CHECK-LABEL: define i64 @peel_multi_exit_multi_latch_loop_iv_step_1(
+; CHECK-SAME: i64 [[N:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_BE:%.*]], %[[LOOP_BACKEDGE:.*]] ]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[IV]], 63
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 10, i32 20
+; CHECK-NEXT: call void @foo(i32 [[COND]])
+; CHECK-NEXT: [[C_1:%.*]] = icmp eq i64 [[IV]], [[N]]
+; CHECK-NEXT: br i1 [[C_1]], label %[[THEN:.*]], label %[[ELSE:.*]]
+; CHECK: [[THEN]]:
+; CHECK-NEXT: call void @foo(i32 20)
+; CHECK-NEXT: [[IV_NEXT_1:%.*]] = add i64 [[IV]], 1
+; CHECK-NEXT: [[EC_1:%.*]] = icmp ne i64 [[IV_NEXT_1]], 64
+; CHECK-NEXT: br i1 [[EC_1]], label %[[EXIT:.*]], label %[[LOOP_BACKEDGE]]
+; CHECK: [[LOOP_BACKEDGE]]:
+; CHECK-NEXT: [[IV_BE]] = phi i64 [ [[IV_NEXT_1]], %[[THEN]] ], [ [[IV_NEXT_2:%.*]], %[[ELSE]] ]
+; CHECK-NEXT: br label %[[LOOP]]
+; CHECK: [[ELSE]]:
+; CHECK-NEXT: call void @foo(i32 10)
+; CHECK-NEXT: [[IV_NEXT_2]] = add i64 [[IV]], 1
+; CHECK-NEXT: [[EC_2:%.*]] = icmp ne i64 [[IV_NEXT_2]], 64
+; CHECK-NEXT: br i1 [[EC_2]], label %[[LOOP_BACKEDGE]], label %[[EXIT]]
+; CHECK: [[EXIT]]:
+; CHECK-NEXT: [[IV_LCSSA:%.*]] = phi i64 [ [[IV]], %[[ELSE]] ], [ [[IV]], %[[THEN]] ]
+; CHECK-NEXT: ret i64 [[IV_LCSSA]]
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next.1, %then ], [ %iv.next.2, %else ]
+ %cmp = icmp eq i64 %iv, 63
+ %cond = select i1 %cmp, i32 10, i32 20
+ call void @foo(i32 %cond)
+ %c.1 = icmp eq i64 %iv, %N
+ br i1 %c.1, label %then, label %else
+
+then:
+ call void @foo(i32 20)
+ %iv.next.1 = add i64 %iv, 1
+ %ec.1 = icmp ne i64 %iv.next.1, 64
+ br i1 %ec.1, label %exit, label %loop
+
+else:
+ call void @foo(i32 10)
+ %iv.next.2 = add i64 %iv, 1
+ %ec.2 = icmp ne i64 %iv.next.2, 64
+ br i1 %ec.2, label %loop, label %exit
+
+exit:
+ ret i64 %iv
+}
+
declare void @foo(i32)
declare i1 @cond()
+
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