[llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)

[Harrison Hao via llvm-commits]

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@@ -0,0 +1,764 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
+
+define i32 @out32(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
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harrisonGPU wrote:

I have a quetion, In hasAndNot we have:
```
  if (Op->isDivergent())
    return false;
```
Values in VGPRs are divergent, so the check returns false right away—the pass only triggers on inreg values. With that in mind, do we really need a VGPR test case?

https://github.com/llvm/llvm-project/pull/112647