[llvm] [AMDGPU] Eliminate unnecessary packing in wider f16 vectors for sdwa/opsel-able instruction (PR #137137)

[Matt Arsenault via llvm-commits]

================
@@ -0,0 +1,2758 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn -mcpu=gfx803 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX8 %s
----------------
arsenm wrote:

This test isn't adding anything useful. We should already have dedicated tests for each of these intrinsics covering all the types. This is not testing a unique fold based on the use context 

https://github.com/llvm/llvm-project/pull/137137