[llvm] [RISCV] Add hasSideEffects = true to ReadFRM (PR #139864)

[Gergely Futo via llvm-commits]

futog wrote:

> > > Does implementing `RISCVTargetLowering::getRoundingControlRegisters()` fix this?
> > 
> > 
> > No. As far as I understand, this is used in case of inline asm.
> 
> It's used to add FRM as an implicit def to calls.
> 
> ```
>   // Add rounding control registers as implicit def for function call.
>   if (II.isCall() && MF->getFunction().hasFnAttribute(Attribute::StrictFP)) {
>     ArrayRef<MCPhysReg> RCRegs = TLI->getRoundingControlRegisters();
>     for (MCPhysReg Reg : RCRegs)
>       UsedRegs.push_back(Reg);
>   } 
> ```
> 
> I've tested locally that it does fix your test case.

Oops I missed that if, sorry, but yes I also implemented `RISCVTargetLowering::getRoundingControlRegisters()` and machine-cse still reordered things.

https://github.com/llvm/llvm-project/pull/139864