[llvm] [AMDGPU] Implement hasAndNot for scalar bitwise AND-NOT operations. (PR #112647)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue May 13 09:01:56 PDT 2025


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@@ -0,0 +1,764 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
+
+define i32 @out32(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
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arsenm wrote:

Not sure what "out32" refers to. Need SGPR and VGPR versions of the tests (which usually use s_ and v_ prefixes)

https://github.com/llvm/llvm-project/pull/112647


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