[llvm] [MachineScheduler][AArch64] Skip Neoverse V2 Pre-RA MISched for large vector intrinsic codes (PR #139557)

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github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions h,cpp -- llvm/include/llvm/Analysis/TargetTransformInfo.h llvm/include/llvm/Analysis/TargetTransformInfoImpl.h llvm/include/llvm/CodeGen/TargetSubtargetInfo.h llvm/lib/Analysis/TargetTransformInfo.cpp llvm/lib/CodeGen/MachineScheduler.cpp llvm/lib/Target/AArch64/AArch64Subtarget.cpp llvm/lib/Target/AArch64/AArch64Subtarget.h llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
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<summary>
View the diff from clang-format here.
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``````````diff
diff --git a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
index ab901f969..91530027f 100644
--- a/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
@@ -184,9 +184,7 @@ public:
     return false;
   }
 
-  virtual bool enableSkipPreRASchedLargeVecFunc() const {
-    return false;
-  }
+  virtual bool enableSkipPreRASchedLargeVecFunc() const { return false; }
 
   /// True if the subtarget should run MachineScheduler after aggressive
   /// coalescing.
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index ee1a058aa..901e4be9f 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -680,7 +680,8 @@ bool MachineSchedulerLegacy::runOnMachineFunction(MachineFunction &MF) {
   // with this.
   const TargetSubtargetInfo &STI = MF.getSubtarget();
   const MCSchedModel &SchedModel = STI.getSchedModel();
-  auto &TTI = getAnalysis<TargetTransformInfoWrapperPass>().getTTI(MF.getFunction());
+  auto &TTI =
+      getAnalysis<TargetTransformInfoWrapperPass>().getTTI(MF.getFunction());
 
   if (TTI.skipPreRASchedLargeVecFunc()) {
     uint64_t InstructionCount = 0;
@@ -688,16 +689,16 @@ bool MachineSchedulerLegacy::runOnMachineFunction(MachineFunction &MF) {
     uint64_t VectorTypeCount = 0;
     for (auto &BB : MF.getFunction()) {
       for (Instruction &I : BB) {
-       InstructionCount++;
-       if (isa<IntrinsicInst>(I))
-         IntrinsicCount++;
-       Type *T = I.getType();
-       if (T && T->isVectorTy())
-         VectorTypeCount++;
+        InstructionCount++;
+        if (isa<IntrinsicInst>(I))
+          IntrinsicCount++;
+        Type *T = I.getType();
+        if (T && T->isVectorTy())
+          VectorTypeCount++;
       }
     }
 
-    unsigned VecDensity = (VectorTypeCount / (double) InstructionCount) * 100;
+    unsigned VecDensity = (VectorTypeCount / (double)InstructionCount) * 100;
 
     LLVM_DEBUG(dbgs() << "Instruction count: " << InstructionCount << ", ";
                dbgs() << "threshold: " << LargeFunctionThreshold << "\n";
@@ -711,7 +712,8 @@ bool MachineSchedulerLegacy::runOnMachineFunction(MachineFunction &MF) {
         IntrinsicCount > NbOfIntrinsicsThreshold &&
         VecDensity > VectorCodeDensityPercentageThreshold) {
       LLVM_DEBUG(
-          dbgs() << "Skipping MISched for very vector and intrinsic heavy code");
+          dbgs()
+          << "Skipping MISched for very vector and intrinsic heavy code");
       return false;
     }
   }

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https://github.com/llvm/llvm-project/pull/139557