[compiler-rt] [flang] [llvm] [AArch64] fix trampoline implementation: use X15 (PR #126743)
Jameson Nash via llvm-commits
llvm-commits at lists.llvm.org
Tue May 13 08:54:26 PDT 2025
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@@ -523,6 +537,7 @@ def CC_AArch64_Preserve_None : CallingConv<[
// We can pass arguments in all general registers, except:
// - X8, used for sret
// - X16/X17, used by the linker as IP0/IP1
+ // - X15, the nest register and used by Windows for stack allocation
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vtjnash wrote:
For the X9 thing, I just wanted to note (unrelated to this PR though) that in my reading of the code, it looks like the findScratchNonCalleeSaveRegister would next pick X16 for CC_AArch64_Preserve_None. That register seems to only actually be available only if there are no calls while it is active (it is reserved by the linker as IP0). I think the only suspect use of that call there is to preserve the value of X0 around the call to __arm_get_current_vg (CallingConv::AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1), which means the argument value being passes in X0 with preserve_none will sometimes get smashed at runtime by the linker, if the LLVM optimizer decides to insert that function call to spill SVE state (https://llvm.org/docs/AArch64SME.html#compiler-inserted-streaming-mode-changes).
https://github.com/llvm/llvm-project/pull/126743
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