[llvm] 882a4c5 - [X86] combineGatherScatter - ensure index / pointer sizes match when converting index shift to scale (#140110)

[via llvm-commits]

Author: Simon Pilgrim
Date: 2025-05-16T11:41:21+01:00
New Revision: 882a4c531f6d9903d1d98e6fbd2be7b29ff7bdc3

URL: https://github.com/llvm/llvm-project/commit/882a4c531f6d9903d1d98e6fbd2be7b29ff7bdc3
DIFF: https://github.com/llvm/llvm-project/commit/882a4c531f6d9903d1d98e6fbd2be7b29ff7bdc3.diff

LOG: [X86] combineGatherScatter - ensure index / pointer sizes match when converting index shift to scale (#140110)

The index value can sext/trunc to the pointer size before being scaled

Noticed while reviewing #139703

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9be3b39ce16fa..cc45067fbf300 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -56715,7 +56715,8 @@ static SDValue combineGatherScatter(SDNode *N, SelectionDAG &DAG,
   if (DCI.isBeforeLegalize()) {
     // Attempt to move shifted index into the address scale, allows further
     // index truncation below.
-    if (Index.getOpcode() == ISD::SHL && isa<ConstantSDNode>(Scale)) {
+    if (Index.getOpcode() == ISD::SHL && IndexSVT == PtrVT &&
+        isa<ConstantSDNode>(Scale)) {
       unsigned ScaleAmt = Scale->getAsZExtVal();
       assert(isPowerOf2_32(ScaleAmt) && "Scale must be a power of 2");
       unsigned Log2ScaleAmt = Log2_32(ScaleAmt);