[llvm] c5ec668 - [AArch64][GlobalISel] Add a known-bits build vector test. NFC

[David Green via llvm-commits]

Author: David Green
Date: 2025-05-17T12:10:11+01:00
New Revision: c5ec66880bd3bcab3a93cd1ccf3d6947501b3a9e

URL: https://github.com/llvm/llvm-project/commit/c5ec66880bd3bcab3a93cd1ccf3d6947501b3a9e
DIFF: https://github.com/llvm/llvm-project/commit/c5ec66880bd3bcab3a93cd1ccf3d6947501b3a9e.diff

LOG: [AArch64][GlobalISel] Add a known-bits build vector test. NFC

Added: 
    llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir
new file mode 100644
index 0000000000000..3f2bb1eed572b
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownbits-buildvector.mir
@@ -0,0 +1,67 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking>" %s -filetype=null 2>&1 | FileCheck %s
+
+---
+name:            const
+body:             |
+  bb.1:
+  ; CHECK-LABEL: name: @const
+  ; CHECK-NEXT: %0:_ KnownBits:00000011 SignBits:6
+  ; CHECK-NEXT: %1:_ KnownBits:00001010 SignBits:4
+  ; CHECK-NEXT: %2:_ KnownBits:0000?01? SignBits:4
+    %0:_(s8) = G_CONSTANT i8 3
+    %1:_(s8) = G_CONSTANT i8 10
+    %2:_(<2 x s8>) = G_BUILD_VECTOR %0, %1
+...
+---
+name:            const_lane1
+body:             |
+  bb.1:
+  ; CHECK-LABEL: name: @const_lane1
+  ; CHECK-NEXT: %0:_ KnownBits:00000011 SignBits:6
+  ; CHECK-NEXT: %1:_ KnownBits:00001010 SignBits:4
+  ; CHECK-NEXT: %2:_ KnownBits:0000?01? SignBits:4
+  ; CHECK-NEXT: %idx:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000001 SignBits:63
+  ; CHECK-NEXT: %4:_ KnownBits:???????? SignBits:1
+    %0:_(s8) = G_CONSTANT i8 3
+    %1:_(s8) = G_CONSTANT i8 10
+    %2:_(<2 x s8>) = G_BUILD_VECTOR %0, %1
+    %idx:_(s64) = G_CONSTANT i64 1
+    %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %idx
+...
+---
+name:            sextsignbits
+body:             |
+  bb.1:
+  ; CHECK-LABEL: name: @sextsignbits
+  ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
+  ; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
+  ; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:25
+  ; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:17
+  ; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????? SignBits:17
+    %0:_(s8) = COPY $b0
+    %1:_(s16) = COPY $h1
+    %2:_(s32) = G_SEXT %0
+    %3:_(s32) = G_SEXT %1
+    %4:_(<2 x s32>) = G_BUILD_VECTOR %2, %3
+...
+---
+name:            sextsignbits_lane1
+body:             |
+  bb.1:
+  ; CHECK-LABEL: name: @sextsignbits_lane1
+  ; CHECK-NEXT: %0:_ KnownBits:???????? SignBits:1
+  ; CHECK-NEXT: %1:_ KnownBits:???????????????? SignBits:1
+  ; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:25
+  ; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:17
+  ; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????? SignBits:17
+  ; CHECK-NEXT: %idx:_ KnownBits:0000000000000000000000000000000000000000000000000000000000000001 SignBits:63
+  ; CHECK-NEXT: %6:_ KnownBits:???????????????????????????????? SignBits:1
+    %0:_(s8) = COPY $b0
+    %1:_(s16) = COPY $h1
+    %2:_(s32) = G_SEXT %0
+    %3:_(s32) = G_SEXT %1
+    %4:_(<2 x s32>) = G_BUILD_VECTOR %2, %3
+    %idx:_(s64) = G_CONSTANT i64 1
+    %5:_(s32) = G_EXTRACT_VECTOR_ELT %4, %idx
+...