[llvm] [LLVM] treat `@llvm.ssub.sat` the same as `@llvm.aarch64.neon.sqsub` (PR #140454)

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github-actions[bot] wrote:

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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
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<summary>
View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 9db3e797b..d06f59872 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -1798,28 +1798,28 @@ bool AArch64LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
   case Intrinsic::aarch64_neon_sqadd: {
     MachineIRBuilder MIB(MI);
     if (MIB.getMRI()->getType(MI.getOperand(0).getReg()).isVector())
-        return LowerBinOp(TargetOpcode::G_SADDSAT);
+      return LowerBinOp(TargetOpcode::G_SADDSAT);
 
     break;
   }
   case Intrinsic::aarch64_neon_sqsub: {
     MachineIRBuilder MIB(MI);
     if (MIB.getMRI()->getType(MI.getOperand(0).getReg()).isVector())
-        return LowerBinOp(TargetOpcode::G_SSUBSAT);
+      return LowerBinOp(TargetOpcode::G_SSUBSAT);
 
     break;
   }
   case Intrinsic::aarch64_neon_uqadd: {
     MachineIRBuilder MIB(MI);
     if (MIB.getMRI()->getType(MI.getOperand(0).getReg()).isVector())
-        return LowerBinOp(TargetOpcode::G_UADDSAT);
+      return LowerBinOp(TargetOpcode::G_UADDSAT);
 
     break;
   }
   case Intrinsic::aarch64_neon_uqsub: {
     MachineIRBuilder MIB(MI);
     if (MIB.getMRI()->getType(MI.getOperand(0).getReg()).isVector())
-        return LowerBinOp(TargetOpcode::G_USUBSAT);
+      return LowerBinOp(TargetOpcode::G_USUBSAT);
 
     break;
   }

``````````

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https://github.com/llvm/llvm-project/pull/140454