[llvm] [PowerPC] Add load/store support for v2048i1 and DMF cryptography instructions (PR #136145)

[Maryam Moghadas via llvm-commits]

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@@ -260,3 +336,54 @@ let Predicates = [MMA, PrefixInstrs, IsISAFuture] in {
             (PMDMXVI8GERX4SPP $ATi, $XAp, RCCp.BToVSRC, Msk8Imm:$XMSK,
                            Msk4Imm:$YMSK, Msk4Imm:$PMSK)>;
 }
+
+// cryptography Intrinsics
+let Predicates = [IsISAFuture] in {
+  def : Pat<(v1024i1 (int_ppc_mma_dmsha2hash v1024i1:$ATi, v1024i1:$AB, timm:$T)),
+             (DMSHA2HASH $ATi, $AB, $T)>;
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maryammo wrote:

In the Pat for the third one, it uses `RCCp.BToVSRC`, which expands to `(COPY_TO_REGCLASS $XB, VSRC)` based on : 
```
def RCCp {
  dag AToVSRC = (COPY_TO_REGCLASS $XA, VSRC);
  dag BToVSRC = (COPY_TO_REGCLASS $XB, VSRC);
}
```
It seems using COPY_TO_REGCLASS requires a separate Pat and is not allowed in instruction patterns. So combining them makes it fail to build.


https://github.com/llvm/llvm-project/pull/136145