[llvm] [WIP][CodeGen] Modifying MBB's liveins representation as into regUnits (PR #129847)
Vikash Gupta via llvm-commits
llvm-commits at lists.llvm.org
Sun May 18 23:42:15 PDT 2025
================
@@ -88,7 +88,7 @@ void LiveRegUnits::accumulate(const MachineInstr &MI) {
static void addBlockLiveIns(LiveRegUnits &LiveUnits,
const MachineBasicBlock &MBB) {
for (const auto &LI : MBB.liveins())
- LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
+ LiveUnits.addRegMasked(LI, LaneBitmask::getAll());
----------------
vg0204 wrote:
> Further simplification is possible here, since this is the only call to addRegMasked so it no longer needs a Mask argument.
Yes, agreed, for that, addRegmasked requires a default lanemask arg which is not the current case!
https://github.com/llvm/llvm-project/pull/129847
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