[llvm] [AArch64][SVE] Add lowering for PARTIAL_REDUCE_U/SMLA to USDOT (PR #131327)

[Sander de Smalen via llvm-commits]

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@@ -924,7 +924,8 @@ SDValue DAGTypeLegalizer::CreateStackStoreLoad(SDValue Op,
 /// illegal ResNo in that case.
 bool DAGTypeLegalizer::CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult) {
   // See if the target wants to custom lower this node.
-  if (TLI.getOperationAction(N->getOpcode(), VT) != TargetLowering::Custom)
+  unsigned Opcode = N->getOpcode();
+  if (TLI.getOperationAction(Opcode, VT) != TargetLowering::Custom)
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sdesmalen-arm wrote:

nit: unnecessary change.

https://github.com/llvm/llvm-project/pull/131327