[llvm] [SelectionDAG] Introduce ISD::PTRADD (PR #140017)
Fabian Ritter via llvm-commits
llvm-commits at lists.llvm.org
Thu May 15 05:30:15 PDT 2025
================
@@ -2388,7 +2391,7 @@ static bool canFoldInAddressingMode(SDNode *N, SDNode *Use, SelectionDAG &DAG,
}
TargetLowering::AddrMode AM;
- if (N->getOpcode() == ISD::ADD) {
+ if (N->getOpcode() == ISD::ADD || N->getOpcode() == ISD::PTRADD) {
----------------
ritter-x2a wrote:
Thanks for looking into this! The original PR, from which this is extracted, is from an effort to support an AArch64 memory safety ISA extension; I strongly suspect that supporting ARM's pre-indexed addressing mode in the presence of PTRADD was the motivation for this line. If this is too ARM-specific to be included in this PR, I can drop it and leave it for @rgwott to include in the updated #105669.
https://github.com/llvm/llvm-project/pull/140017
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