[llvm] [TableGen] Avoid assignmentInAssert warning (PR #139715)

[Jay Foad via llvm-commits]

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@@ -2608,9 +2608,9 @@ void GICombinerEmitter::emitTestSimplePredicate(raw_ostream &OS) {
     // That way we can just get the RuleID from the enum by subtracting
     // (GICXXPred_Invalid + 1).
     unsigned ExpectedID = 0;
-    (void)ExpectedID;
     for (const auto &ID : keys(AllCombineRules)) {
-      assert(ExpectedID++ == ID && "combine rules are not ordered!");
+      ++ExpectedID;
+      assert(ExpectedID == ID && "combine rules are not ordered!");
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jayfoad wrote:

The original code used post-increment, so these two lines should be swapped.

https://github.com/llvm/llvm-project/pull/139715