[llvm] [RISCV] Use RISCVRegisterInfo::isRVVRegClass to replace IsScalableVector in storeRegToStackSlot/loadRegFromStackSlot. NFC (PR #139979)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Thu May 15 07:14:13 PDT 2025

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https://github.com/preames approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/139979

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